#[repr(u8)]pub enum SmartdmaarchbInmuxInp {
Show 128 variants
VAL0 = 0,
VAL1 = 1,
VAL2 = 2,
VAL3 = 3,
VAL4 = 4,
VAL5 = 5,
VAL6 = 6,
VAL7 = 7,
VAL8 = 8,
VAL9 = 9,
VAL10 = 10,
VAL11 = 11,
VAL12 = 12,
VAL13 = 13,
VAL14 = 14,
VAL15 = 15,
VAL16 = 16,
VAL17 = 17,
_RESERVED_12 = 18,
_RESERVED_13 = 19,
VAL20 = 20,
VAL21 = 21,
VAL22 = 22,
VAL23 = 23,
VAL24 = 24,
VAL25 = 25,
VAL26 = 26,
VAL27 = 27,
VAL28 = 28,
VAL29 = 29,
VAL30 = 30,
VAL31 = 31,
_RESERVED_20 = 32,
VAL33 = 33,
VAL34 = 34,
VAL35 = 35,
VAL36 = 36,
VAL37 = 37,
VAL38 = 38,
VAL39 = 39,
VAL40 = 40,
VAL41 = 41,
VAL42 = 42,
VAL43 = 43,
VAL44 = 44,
VAL45 = 45,
VAL46 = 46,
_RESERVED_2f = 47,
_RESERVED_30 = 48,
VAL49 = 49,
VAL50 = 50,
VAL51 = 51,
VAL52 = 52,
VAL53 = 53,
VAL54 = 54,
VAL55 = 55,
VAL56 = 56,
VAL57 = 57,
VAL58 = 58,
VAL59 = 59,
VAL60 = 60,
VAL61 = 61,
VAL62 = 62,
_RESERVED_3f = 63,
_RESERVED_40 = 64,
VAL65 = 65,
VAL66 = 66,
VAL67 = 67,
VAL68 = 68,
VAL69 = 69,
VAL70 = 70,
_RESERVED_47 = 71,
_RESERVED_48 = 72,
_RESERVED_49 = 73,
_RESERVED_4a = 74,
_RESERVED_4b = 75,
_RESERVED_4c = 76,
_RESERVED_4d = 77,
_RESERVED_4e = 78,
_RESERVED_4f = 79,
_RESERVED_50 = 80,
_RESERVED_51 = 81,
_RESERVED_52 = 82,
_RESERVED_53 = 83,
_RESERVED_54 = 84,
_RESERVED_55 = 85,
_RESERVED_56 = 86,
_RESERVED_57 = 87,
_RESERVED_58 = 88,
_RESERVED_59 = 89,
_RESERVED_5a = 90,
_RESERVED_5b = 91,
_RESERVED_5c = 92,
_RESERVED_5d = 93,
_RESERVED_5e = 94,
_RESERVED_5f = 95,
_RESERVED_60 = 96,
_RESERVED_61 = 97,
_RESERVED_62 = 98,
_RESERVED_63 = 99,
_RESERVED_64 = 100,
_RESERVED_65 = 101,
_RESERVED_66 = 102,
_RESERVED_67 = 103,
_RESERVED_68 = 104,
_RESERVED_69 = 105,
_RESERVED_6a = 106,
_RESERVED_6b = 107,
_RESERVED_6c = 108,
_RESERVED_6d = 109,
_RESERVED_6e = 110,
_RESERVED_6f = 111,
_RESERVED_70 = 112,
_RESERVED_71 = 113,
_RESERVED_72 = 114,
_RESERVED_73 = 115,
_RESERVED_74 = 116,
_RESERVED_75 = 117,
_RESERVED_76 = 118,
_RESERVED_77 = 119,
_RESERVED_78 = 120,
_RESERVED_79 = 121,
_RESERVED_7a = 122,
_RESERVED_7b = 123,
_RESERVED_7c = 124,
_RESERVED_7d = 125,
_RESERVED_7e = 126,
_RESERVED_7f = 127,
}Variants§
VAL0 = 0
FlexIO interrupt is selected as input.
VAL1 = 1
GPIO P0_1 input is selected.
VAL2 = 2
GPIO P0_2 input is selected.
VAL3 = 3
GPIO P0_3 input is selected.
VAL4 = 4
GPIO P0_4 input is selected.
VAL5 = 5
GPIO P0_5 input is selected.
VAL6 = 6
GPIO P0_6 input is selected.
VAL7 = 7
GPIO P0_7 input is selected.
VAL8 = 8
GPIO P0_8 input is selected.
VAL9 = 9
GPIO P0_9 input is selected.
VAL10 = 10
GPIO P0_10 input is selected.
VAL11 = 11
GPIO P0_11 input is selected.
VAL12 = 12
GPIO P0_12 input is selected.
VAL13 = 13
GPIO P0_13 input is selected.
VAL14 = 14
GPIO P0_14 input is selected.
VAL15 = 15
GPIO P0_15 input is selected.
VAL16 = 16
SCT0 SCT_OUT8 input is selected.
VAL17 = 17
SCT0 SCT_OUT9 input is selected.
_RESERVED_12 = 18
_RESERVED_13 = 19
VAL20 = 20
MRT0 MRT_CH0_IRQ input is selected.
VAL21 = 21
MRT0 MRT_CH1_IRQ input is selected.
VAL22 = 22
CTIMER4_MAT3 input is selected.
VAL23 = 23
CTIMER4_MAT2 input is selected.
VAL24 = 24
CTIMER3_MAT3 input is selected.
VAL25 = 25
CTIMER3_MAT2 input is selected.
VAL26 = 26
CTIMER1_MAT3 input is selected.
VAL27 = 27
CTIMER1_MAT2 input is selected.
VAL28 = 28
UTICK0 UTICK_IRQ input is selected.
VAL29 = 29
WWDT0 WDT0_IRQ input is selected.
VAL30 = 30
ADC0 ADC0_IRQ input is selected.
VAL31 = 31
CMP0_IRQ input is selected.
_RESERVED_20 = 32
VAL33 = 33
LP_FLEXCOMM7_IRQ input is selected.
VAL34 = 34
LP_FLEXCOMM6_IRQ input is selected.
VAL35 = 35
LP_FLEXCOMM5_IRQ input is selected.
VAL36 = 36
LP_FLEXCOMM4_IRQ input is selected.
VAL37 = 37
LP_FLEXCOMM3_IRQ input is selected.
VAL38 = 38
LP_FLEXCOMM2_IRQ input is selected.
VAL39 = 39
LP_FLEXCOMM1_IRQ input is selected.
VAL40 = 40
LP_FLEXCOMM0_IRQ input is selected.
VAL41 = 41
DMA0_IRQ input is selected.
VAL42 = 42
DMA1_IRQ input is selected.
VAL43 = 43
SYS_IRQSYS_IRQ combines the CDOG IRQ, WWDT IRQ, MBC secure violation IRQ, Secure AHB Matrix secure violation IRQ, GDET IRQ, ELS S50 error IRQ, PKC error IRQ, and VBAT IRQ using the logical OR operation. input is selected.
VAL44 = 44
RTC_COMBO_IRQ input is selected.
VAL45 = 45
ARM_TXEV input is selected.
VAL46 = 46
PINT0 GPIO_INT_BMATCH input is selected.
_RESERVED_2f = 47
_RESERVED_30 = 48
VAL49 = 49
CMP0_OUT input is selected.
VAL50 = 50
usb0 start of frame input is selected.
VAL51 = 51
usb1 start of frame input is selected.
VAL52 = 52
OSTIMER0 OS_EVENT_TIMER_IRQ input is selected.
VAL53 = 53
ADC1_IRQ input is selected.
VAL54 = 54
CMP0_IRQ/CMP1_IRQ/CMP2_IRQ input is selected.
VAL55 = 55
DAC0_IRQ input is selected.
VAL56 = 56
DAC1_IRQ/DAC2_IRQ input is selected.
VAL57 = 57
PWM0_IRQ input is selected.
VAL58 = 58
PWM1_IRQ input is selected.
VAL59 = 59
QDC0_IRQ input is selected.
VAL60 = 60
QDC1_IRQ input is selected.
VAL61 = 61
EVTG_OUT0A input is selected.
VAL62 = 62
EVTG_OUT1A input is selected.
_RESERVED_3f = 63
_RESERVED_40 = 64
VAL65 = 65
GPIO1_alias0 GPIO1 Pin Event Trig 0 input is selected.
VAL66 = 66
GPIO1_alias1 GPIO1 Pin Event Trig 1 input is selected.
VAL67 = 67
GPIO2_alias0 GPIO2 Pin Event Trig 0 input is selected.
VAL68 = 68
GPIO2_alias1 GPIO2 Pin Event Trig 1 input is selected.
VAL69 = 69
GPIO3_alias0 GPIO3 Pin Event Trig 0 input is selected.
VAL70 = 70
GPIO3_alias1 GPIO3 Pin Event Trig 1 input is selected.
_RESERVED_47 = 71
_RESERVED_48 = 72
_RESERVED_49 = 73
_RESERVED_4a = 74
_RESERVED_4b = 75
_RESERVED_4c = 76
_RESERVED_4d = 77
_RESERVED_4e = 78
_RESERVED_4f = 79
_RESERVED_50 = 80
_RESERVED_51 = 81
_RESERVED_52 = 82
_RESERVED_53 = 83
_RESERVED_54 = 84
_RESERVED_55 = 85
_RESERVED_56 = 86
_RESERVED_57 = 87
_RESERVED_58 = 88
_RESERVED_59 = 89
_RESERVED_5a = 90
_RESERVED_5b = 91
_RESERVED_5c = 92
_RESERVED_5d = 93
_RESERVED_5e = 94
_RESERVED_5f = 95
_RESERVED_60 = 96
_RESERVED_61 = 97
_RESERVED_62 = 98
_RESERVED_63 = 99
_RESERVED_64 = 100
_RESERVED_65 = 101
_RESERVED_66 = 102
_RESERVED_67 = 103
_RESERVED_68 = 104
_RESERVED_69 = 105
_RESERVED_6a = 106
_RESERVED_6b = 107
_RESERVED_6c = 108
_RESERVED_6d = 109
_RESERVED_6e = 110
_RESERVED_6f = 111
_RESERVED_70 = 112
_RESERVED_71 = 113
_RESERVED_72 = 114
_RESERVED_73 = 115
_RESERVED_74 = 116
_RESERVED_75 = 117
_RESERVED_76 = 118
_RESERVED_77 = 119
_RESERVED_78 = 120
_RESERVED_79 = 121
_RESERVED_7a = 122
_RESERVED_7b = 123
_RESERVED_7c = 124
_RESERVED_7d = 125
_RESERVED_7e = 126
_RESERVED_7f = 127
Implementations§
Trait Implementations§
Source§impl Clone for SmartdmaarchbInmuxInp
impl Clone for SmartdmaarchbInmuxInp
Source§fn clone(&self) -> SmartdmaarchbInmuxInp
fn clone(&self) -> SmartdmaarchbInmuxInp
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more