#[repr(transparent)]pub struct ElsAsSt1(pub u32);Expand description
ELS AS State1
Tuple Fields§
§0: u32Implementations§
Source§impl ElsAsSt1
impl ElsAsSt1
Sourcepub const fn st_qk_puf_score(&self) -> u8
pub const fn st_qk_puf_score(&self) -> u8
These register bits indicate the state of “qk_puf_score[3:0]” outputs from QK PUF block
Sourcepub const fn set_st_qk_puf_score(&mut self, val: u8)
pub const fn set_st_qk_puf_score(&mut self, val: u8)
These register bits indicate the state of “qk_puf_score[3:0]” outputs from QK PUF block
Sourcepub const fn st_qk_zeroized(&self) -> bool
pub const fn st_qk_zeroized(&self) -> bool
This register bit indicates the state of “qk_zeroized” output from QK PUF block
Sourcepub const fn set_st_qk_zeroized(&mut self, val: bool)
pub const fn set_st_qk_zeroized(&mut self, val: bool)
This register bit indicates the state of “qk_zeroized” output from QK PUF block
Sourcepub const fn st_main_clk_is_ext(&self) -> bool
pub const fn st_main_clk_is_ext(&self) -> bool
When MAIN_CLK is running from external clock source either XO32M, XO32K or GPIO CLKIN, this bit indicates state 1
Sourcepub const fn set_st_main_clk_is_ext(&mut self, val: bool)
pub const fn set_st_main_clk_is_ext(&mut self, val: bool)
When MAIN_CLK is running from external clock source either XO32M, XO32K or GPIO CLKIN, this bit indicates state 1
Sourcepub const fn st_dcdc_vout(&self) -> u8
pub const fn st_dcdc_vout(&self) -> u8
VOUT[1:0] setting on DCDC0 register in SPC block will reflect to this register. Default is 1.0V
Sourcepub const fn set_st_dcdc_vout(&mut self, val: u8)
pub const fn set_st_dcdc_vout(&mut self, val: u8)
VOUT[1:0] setting on DCDC0 register in SPC block will reflect to this register. Default is 1.0V
Sourcepub const fn st_dcdc_ds(&self) -> u8
pub const fn st_dcdc_ds(&self) -> u8
DCDC drive strength setting. Default is normal drive.
Sourcepub const fn set_st_dcdc_ds(&mut self, val: u8)
pub const fn set_st_dcdc_ds(&mut self, val: u8)
DCDC drive strength setting. Default is normal drive.
Sourcepub const fn st_boot_mode(&self) -> u8
pub const fn st_boot_mode(&self) -> u8
ISP pin status during boot. By default ISP pin is pulled up. If want to enter ISP mode during boot, ISP pin should be pull down when out of reset.
Sourcepub const fn set_st_boot_mode(&mut self, val: u8)
pub const fn set_st_boot_mode(&mut self, val: u8)
ISP pin status during boot. By default ISP pin is pulled up. If want to enter ISP mode during boot, ISP pin should be pull down when out of reset.
Sourcepub const fn st_boot_retry_cnt(&self) -> u8
pub const fn st_boot_retry_cnt(&self) -> u8
BOOT_RETRY_CNT[3:0] in the ELS_BOOT_RETRY_CNT register reflects this register
Sourcepub const fn set_st_boot_retry_cnt(&mut self, val: u8)
pub const fn set_st_boot_retry_cnt(&mut self, val: u8)
BOOT_RETRY_CNT[3:0] in the ELS_BOOT_RETRY_CNT register reflects this register
Sourcepub const fn st_ldo_core_vout(&self) -> u8
pub const fn st_ldo_core_vout(&self) -> u8
VOUT[1:0] setting on LDO Core register in SPC block will reflect to this register. Default is 1.0V
Sourcepub const fn set_st_ldo_core_vout(&mut self, val: u8)
pub const fn set_st_ldo_core_vout(&mut self, val: u8)
VOUT[1:0] setting on LDO Core register in SPC block will reflect to this register. Default is 1.0V
Sourcepub const fn st_ldo_core_ds(&self) -> u8
pub const fn st_ldo_core_ds(&self) -> u8
LDO_CORE drive strength setting. Default is normal drive.
Sourcepub const fn set_st_ldo_core_ds(&mut self, val: u8)
pub const fn set_st_ldo_core_ds(&mut self, val: u8)
LDO_CORE drive strength setting. Default is normal drive.