Struct Ahbsc 

pub struct Ahbsc { /* private fields */ }

AHBSC

Implementations

impl Ahbsc

pub const unsafe fn from_ptr(ptr: *mut ()) -> Self

pub const fn as_ptr(&self) -> *mut ()

pub const fn flash00_mem_rule(self, n: usize) -> Reg<Flash00MemRule, RW>

Flash Memory Rule

pub const fn flash01_mem_rule(self, n: usize) -> Reg<Flash01MemRule, RW>

Flash Memory Rule

pub const fn flash02_mem_rule(self) -> Reg<Flash02MemRule, RW>

Flash Memory Rule

pub const fn flash03_mem_rule(self) -> Reg<Flash03MemRule, RW>

Flash Memory Rule

pub const fn rom_mem_rule(self, n: usize) -> Reg<RomMemRule, RW>

ROM Memory Rule

pub const fn ramx_mem_rule(self, n: usize) -> Reg<RamxMemRule, RW>

RAMX Memory Rule

pub const fn rama_mem_rule(self) -> Reg<RamaMemRule, RW>

RAMA Memory Rule 0

pub const fn ramb_mem_rule(self) -> Reg<RambMemRule, RW>

RAMB Memory Rule

pub const fn ramc_mem_rule(self, n: usize) -> Reg<RamcMemRule, RW>

RAMC Memory Rule

pub const fn ramd_mem_rule(self, n: usize) -> Reg<RamdMemRule, RW>

RAMD Memory Rule

pub const fn rame_mem_rule(self, n: usize) -> Reg<RameMemRule, RW>

RAME Memory Rule

pub const fn ramf_mem_rule(self, n: usize) -> Reg<RamfMemRule, RW>

RAMF Memory Rule

pub const fn ramg_mem_rule(self, n: usize) -> Reg<RamgMemRule, RW>

RAMG Memory Rule

pub const fn ramh_mem_rule(self) -> Reg<RamhMemRule, RW>

RAMH Memory Rule

pub const fn apb_peripheral_group0_mem_rule0( self, ) -> Reg<ApbPeripheralGroup0MemRule0, RW>

APB Bridge Group 0 Memory Rule 0

pub const fn apb_peripheral_group0_mem_rule1( self, ) -> Reg<ApbPeripheralGroup0MemRule1, RW>

APB Bridge Group 0 Memory Rule 1

pub const fn apb_peripheral_group0_mem_rule2( self, ) -> Reg<ApbPeripheralGroup0MemRule2, RW>

APB Bridge Group 0 Rule 2

pub const fn apb_peripheral_group0_mem_rule3( self, ) -> Reg<ApbPeripheralGroup0MemRule3, RW>

APB Bridge Group 0 Memory Rule 3

pub const fn apb_peripheral_group1_mem_rule0( self, ) -> Reg<ApbPeripheralGroup1MemRule0, RW>

APB Bridge Group 1 Memory Rule 0

pub const fn apb_peripheral_group1_mem_rule1( self, ) -> Reg<ApbPeripheralGroup1MemRule1, RW>

APB Bridge Group 1 Memory Rule 1

pub const fn apb_peripheral_group1_mem_rule2( self, ) -> Reg<ApbPeripheralGroup1MemRule2, RW>

APB Bridge Group 1 Memory Rule 2

pub const fn aips_bridge_group0_mem_rule0( self, ) -> Reg<AipsBridgeGroup0MemRule0, RW>

AIPS Bridge Group 0 Memory Rule 0

pub const fn aips_bridge_group0_mem_rule1( self, ) -> Reg<AipsBridgeGroup0MemRule1, RW>

AIPS Bridge Group 0 Memory Rule 1

pub const fn aips_bridge_group0_mem_rule2( self, ) -> Reg<AipsBridgeGroup0MemRule2, RW>

AIPS Bridge Group 0 Memory Rule 2

pub const fn aips_bridge_group0_mem_rule3( self, ) -> Reg<AipsBridgeGroup0MemRule3, RW>

AIPS Bridge Group 0 Memory Rule 3

pub const fn ahb_peripheral0_slave_port_p12_slave_rule0( self, ) -> Reg<AhbPeripheral0SlavePortP12SlaveRule0, RW>

AHB Peripheral 0 Slave Port 12 Slave Rule 0

pub const fn ahb_peripheral0_slave_port_p12_slave_rule1( self, ) -> Reg<AhbPeripheral0SlavePortP12SlaveRule1, RW>

AHB Peripheral 0 Slave Port 12 Slave Rule 1

pub const fn ahb_peripheral0_slave_port_p12_slave_rule2( self, ) -> Reg<AhbPeripheral0SlavePortP12SlaveRule2, RW>

AHB Peripheral 0 Slave Port 12 Slave Rule 2

pub const fn aips_bridge_group1_mem_rule0( self, ) -> Reg<AipsBridgeGroup1MemRule0, RW>

AIPS Bridge Group 1 Rule 0

pub const fn aips_bridge_group1_mem_rule1( self, ) -> Reg<AipsBridgeGroup1MemRule1, RW>

AIPS Bridge Group 1 Rule 1

pub const fn ahb_peripheral1_slave_port_p13_slave_rule0( self, ) -> Reg<AhbPeripheral1SlavePortP13SlaveRule0, RW>

AHB Peripheral 1 Slave Port 13 Slave Rule 0

pub const fn ahb_peripheral1_slave_port_p13_slave_rule1( self, ) -> Reg<AhbPeripheral1SlavePortP13SlaveRule1, RW>

AHB Peripheral 1 Slave Port 13 Slave Rule 1

pub const fn ahb_peripheral1_slave_port_p13_slave_rule2( self, ) -> Reg<AhbPeripheral1SlavePortP13SlaveRule2, RW>

AHB Peripheral 1 Slave Port 13 Slave Rule 2

pub const fn aips_bridge_group2_mem_rule0( self, ) -> Reg<AipsBridgeGroup2MemRule0, RW>

AIPS Bridge Group 2 Rule 0

pub const fn aips_bridge_group2_mem_rule1( self, ) -> Reg<AipsBridgeGroup2MemRule1, RW>

AIPS Bridge Group 2 Memory Rule 1

pub const fn aips_bridge_group3_mem_rule0( self, ) -> Reg<AipsBridgeGroup3MemRule0, RW>

AIPS Bridge Group 3 Rule 0

pub const fn aips_bridge_group3_mem_rule1( self, ) -> Reg<AipsBridgeGroup3MemRule1, RW>

AIPS Bridge Group 3 Memory Rule 1

pub const fn aips_bridge_group3_mem_rule2( self, ) -> Reg<AipsBridgeGroup3MemRule2, RW>

AIPS Bridge Group 3 Rule 2

pub const fn aips_bridge_group3_mem_rule3( self, ) -> Reg<AipsBridgeGroup3MemRule3, RW>

AIPS Bridge Group 3 Rule 3

pub const fn aips_bridge_group4_mem_rule0( self, ) -> Reg<AipsBridgeGroup4MemRule0, RW>

AIPS Bridge Group 4 Rule 0

pub const fn aips_bridge_group4_mem_rule1( self, ) -> Reg<AipsBridgeGroup4MemRule1, RW>

AIPS Bridge Group 4 Rule 1

pub const fn aips_bridge_group4_mem_rule2( self, ) -> Reg<AipsBridgeGroup4MemRule2, RW>

AIPS Bridge Group 4 Rule 2

pub const fn aips_bridge_group4_mem_rule3( self, ) -> Reg<AipsBridgeGroup4MemRule3, RW>

AIPS Bridge Group 4 Rule 3

pub const fn ahb_secure_ctrl_peripheral_rule0( self, ) -> Reg<AhbSecureCtrlPeripheralRule0, RW>

AHB Secure Control Peripheral Rule 0

pub const fn flexspi0_region0_mem_rule( self, n: usize, ) -> Reg<Flexspi0Region0MemRule, RW>

FLEXSPI0 Region 0 Memory Rule

pub const fn flexspi0_region1_6_mem_rule( self, n: usize, ) -> Flexspi0Region16MemRule

Array of registers: FLEXSPI0_REGION_MEM_RULE0

pub const fn flexspi0_region7_mem_rule( self, n: usize, ) -> Reg<Flexspi0Region7MemRule, RW>

FLEXSPI0 Region 7 Memory Rule

pub const fn flexspi0_region8_13_mem_rule( self, n: usize, ) -> Flexspi0Region813MemRule

Array of registers: FLEXSPI0_REGION_MEM_RULE0

pub const fn sec_vio_addr(self, n: usize) -> Reg<SecVioAddr, R>

Security Violation Address

pub const fn sec_vio_misc_info(self, n: usize) -> Reg<SecVioMiscInfo, R>

Security Violation Miscellaneous Information at Address

pub const fn sec_vio_info_valid(self) -> Reg<SecVioInfoValid, RW>

Security Violation Info Validity for Address

pub const fn sec_gpio_mask(self, n: usize) -> Reg<SecGpioMask, RW>

GPIO Mask for Port index

pub const fn sec_cpu1_int_mask0(self) -> Reg<SecCpu1IntMask0, RW>

Secure Interrupt Mask 0 for CPU1

pub const fn sec_cpu1_int_mask1(self) -> Reg<SecCpu1IntMask1, RW>

Secure Interrupt Mask 1 for CPU1

pub const fn sec_cpu1_int_mask2(self) -> Reg<SecCpu1IntMask2, RW>

Secure Interrupt Mask 2 for CPU1

pub const fn sec_cpu1_int_mask3(self) -> Reg<SecCpu1IntMask3, RW>

Secure Interrupt Mask 3 for CPU1

pub const fn sec_cpu1_int_mask4(self) -> Reg<SecCpu1IntMask4, RW>

Secure Interrupt Mask 4 for CPU1

pub const fn sec_gp_reg_lock(self) -> Reg<SecGpRegLock, RW>

Secure Mask Lock

pub const fn master_sec_level(self) -> Reg<MasterSecLevel, RW>

Master Secure Level

pub const fn master_sec_anti_pol_reg(self) -> Reg<MasterSecAntiPolReg, RW>

Master Secure Level

pub const fn cpu0_lock_reg(self) -> Reg<Cpu0LockReg, RW>

Miscellaneous CPU0 Control Signals

pub const fn cpu1_lock_reg(self) -> Reg<Cpu1LockReg, RW>

Miscellaneous CPU1 Control Signals

pub const fn misc_ctrl_dp_reg(self) -> Reg<MiscCtrlDpReg, RW>

Secure Control Duplicate

pub const fn misc_ctrl_reg(self) -> Reg<MiscCtrlReg, RW>

Secure Control

Trait Implementations

impl Clone for Ahbsc

fn clone(&self) -> Ahbsc

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for Ahbsc

fn eq(&self, other: &Ahbsc) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ahbsc

impl Eq for Ahbsc

impl Send for Ahbsc

impl StructuralPartialEq for Ahbsc

impl Sync for Ahbsc