Struct Dma1ReqEnable3 

#[repr(transparent)]
pub struct Dma1ReqEnable3(pub u32);

DMA1 Request Enable3

Tuple Fields

0: u32

Implementations

impl Dma1ReqEnable3

pub const fn req96_en1(&self) -> Req96En1

This register is used to enable and disable I3C0 transmit request.

pub const fn set_req96_en1(&mut self, val: Req96En1)

This register is used to enable and disable I3C0 transmit request.

pub const fn req97_en1(&self) -> Req97En1

This register is used to enable and disable I3C1 receive request.

pub const fn set_req97_en1(&mut self, val: Req97En1)

This register is used to enable and disable I3C1 receive request.

pub const fn req98_en1(&self) -> Req98En1

This register is used to enable and disable I3C1 transmit request.

pub const fn set_req98_en1(&mut self, val: Req98En1)

This register is used to enable and disable I3C1 transmit request.

pub const fn req99_en1(&self) -> Req99En1

This register is used to enable and disable SAI0 receive request.

pub const fn set_req99_en1(&mut self, val: Req99En1)

This register is used to enable and disable SAI0 receive request.

pub const fn req100_en1(&self) -> Req100En1

This register is used to enable and disable SAI0 transmit request.

pub const fn set_req100_en1(&mut self, val: Req100En1)

This register is used to enable and disable SAI0 transmit request.

pub const fn req101_en1(&self) -> Req101En1

This register is used to enable and disable SAI1 receive request.

pub const fn set_req101_en1(&mut self, val: Req101En1)

This register is used to enable and disable SAI1 receive request.

pub const fn req102_en1(&self) -> Req102En1

This register is used to enable and disable SAI1 transmit request.

pub const fn set_req102_en1(&mut self, val: Req102En1)

This register is used to enable and disable SAI1 transmit request.

pub const fn req103_en1(&self) -> Req103En1

This register is used to enable and disable SINC0 ipd_req_sinc[0] or ipd_req_alt [0] request.

pub const fn set_req103_en1(&mut self, val: Req103En1)

This register is used to enable and disable SINC0 ipd_req_sinc[0] or ipd_req_alt [0] request.

pub const fn req104_en1(&self) -> Req104En1

This register is used to enable and disable SINC0 ipd_req_sinc[1] or ipd_req_alt [1] request.

pub const fn set_req104_en1(&mut self, val: Req104En1)

This register is used to enable and disable SINC0 ipd_req_sinc[1] or ipd_req_alt [1] request.

pub const fn req105_en1(&self) -> Req105En1

This register is used to enable and disable SINC0 ipd_req_sinc[2] or ipd_req_alt [2] request.

pub const fn set_req105_en1(&mut self, val: Req105En1)

This register is used to enable and disable SINC0 ipd_req_sinc[2] or ipd_req_alt [2] request.

pub const fn req106_en1(&self) -> Req106En1

This register is used to enable and disable SINC0 ipd_req_sinc[3] or ipd_req_alt [3] request.

pub const fn set_req106_en1(&mut self, val: Req106En1)

This register is used to enable and disable SINC0 ipd_req_sinc[3] or ipd_req_alt [3] request.

pub const fn req107_en1(&self) -> Req107En1

This register is used to enable and disable SINC0 ipd_req_sinc[4] or ipd_req_alt [4] request.

pub const fn set_req107_en1(&mut self, val: Req107En1)

This register is used to enable and disable SINC0 ipd_req_sinc[4] or ipd_req_alt [4] request.

pub const fn req108_en1(&self) -> Req108En1

This register is used to enable and disable GPIO0 pin event request 0.

pub const fn set_req108_en1(&mut self, val: Req108En1)

This register is used to enable and disable GPIO0 pin event request 0.

pub const fn req109_en1(&self) -> Req109En1

This register is used to enable and disable GPIO0 pin event request 1.

pub const fn set_req109_en1(&mut self, val: Req109En1)

This register is used to enable and disable GPIO0 pin event request 1.

pub const fn req110_en1(&self) -> Req110En1

This register is used to enable and disable GPIO1 pin event request 0.

pub const fn set_req110_en1(&mut self, val: Req110En1)

This register is used to enable and disable GPIO1 pin event request 0.

pub const fn req111_en1(&self) -> Req111En1

This register is used to enable and disable GPIO1 pin event request 1.

pub const fn set_req111_en1(&mut self, val: Req111En1)

This register is used to enable and disable GPIO1 pin event request 1.

pub const fn req112_en1(&self) -> Req112En1

This register is used to enable and disable GPIO2 pin event request 0.

pub const fn set_req112_en1(&mut self, val: Req112En1)

This register is used to enable and disable GPIO2 pin event request 0.

pub const fn req113_en1(&self) -> Req113En1

This register is used to enable and disable GPIO2 pin event request 1.

pub const fn set_req113_en1(&mut self, val: Req113En1)

This register is used to enable and disable GPIO2 pin event request 1.

pub const fn req114_en1(&self) -> Req114En1

This register is used to enable and disable GPIO3 pin event request 0.

pub const fn set_req114_en1(&mut self, val: Req114En1)

This register is used to enable and disable GPIO3 pin event request 0.

pub const fn req115_en1(&self) -> Req115En1

This register is used to enable and disable GPIO3 pin event request 1.

pub const fn set_req115_en1(&mut self, val: Req115En1)

This register is used to enable and disable GPIO3 pin event request 1.

pub const fn req116_en1(&self) -> Req116En1

This register is used to enable and disable GPIO4 pin event request 0.

pub const fn set_req116_en1(&mut self, val: Req116En1)

This register is used to enable and disable GPIO4 pin event request 0.

pub const fn req117_en1(&self) -> Req117En1

This register is used to enable and disable GPIO4 pin event request 1.

pub const fn set_req117_en1(&mut self, val: Req117En1)

This register is used to enable and disable GPIO4 pin event request 1.

pub const fn req118_en1(&self) -> Req118En1

This register is used to enable and disable GPIO5 pin event request 0.

pub const fn set_req118_en1(&mut self, val: Req118En1)

This register is used to enable and disable GPIO5 pin event request 0.

pub const fn req119_en1(&self) -> Req119En1

This register is used to enable and disable GPIO5 pin event request 1.

pub const fn set_req119_en1(&mut self, val: Req119En1)

This register is used to enable and disable GPIO5 pin event request 1.

pub const fn req120_en1(&self) -> Req120En1

This register is used to enable and disable TSI0 end of scan request.

pub const fn set_req120_en1(&mut self, val: Req120En1)

This register is used to enable and disable TSI0 end of scan request.

pub const fn req121_en1(&self) -> Req121En1

This register is used to enable and disable TSI0 out of range request.

pub const fn set_req121_en1(&mut self, val: Req121En1)

This register is used to enable and disable TSI0 out of range request.

Trait Implementations

impl Clone for Dma1ReqEnable3

fn clone(&self) -> Dma1ReqEnable3

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Dma1ReqEnable3

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Dma1ReqEnable3

fn default() -> Dma1ReqEnable3

Returns the “default value” for a type.

impl PartialEq for Dma1ReqEnable3

fn eq(&self, other: &Dma1ReqEnable3) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Dma1ReqEnable3

impl Eq for Dma1ReqEnable3

impl StructuralPartialEq for Dma1ReqEnable3