Structsยง
- Adc0clkdiv
- ADC0 Clock Divider
- Adc0clksel
- ADC0 Clock Source Select
- Adc1clkdiv
- ADC1 Clock Divider
- Adc1clksel
- ADC1 Clock Source Select
- Ahbclkctrl0
- AHB Clock Control 0
- Ahbclkctrl1
- AHB Clock Control 1
- Ahbclkctrl2
- AHB Clock Control 2
- Ahbclkctrl3
- AHB Clock Control 3
- Ahbclkctrlclr
- AHB Clock Control Clear
- Ahbclkctrlset
- AHB Clock Control Set
- Ahbclkdiv
- System Clock Divider
- Ahbmatprio
- AHB Matrix Priority Control
- Autoclkgateoverride
- Control Automatic Clock Gating
- Autoclkgateoverridec
- Control Automatic Clock Gating C
- Binary
Code Lsb - Gray to Binary Converter Binary Code [31:0]
- Binary
Code Msb - Gray to Binary Converter Binary Code [41:32]
- Clkout
Frgctrl - CLKOUT FRG Control
- Clkoutdiv
- CLKOUT Clock Divider
- Clkoutsel
- CLKOUT Clock Source Select
- Clkunlock
- Clock Configuration Unlock
- Clock
Ctrl - Clock Control
- Cmp0fclkdiv
- CMP0 Function Clock Divider
- Cmp0fclksel
- CMP0 Function Clock Selection
- Cmp0rrclkdiv
- CMP0 Round Robin Clock Divider
- Cmp0rrclksel
- CMP0 Round Robin Clock Selection
- Cmp1fclkdiv
- CMP1 Function Clock Divider
- Cmp1fclksel
- CMP1 Function Clock Selection
- Cmp1rrclkdiv
- CMP1 Round Robin Clock Division
- Cmp1rrclksel
- CMP1 Round Robin Clock Source Select
- Cmp2fclkdiv
- CMP2 Function Clock Division
- Cmp2fclksel
- CMP2 Function Clock Source Select
- Cmp2rrclkdiv
- CMP2 Round Robin Clock Division
- Cmp2rrclksel
- CMP2 Round Robin Clock Source Select
- Cpboot
- Coprocessor Boot Address
- Cpu0nstckcal
- Non-Secure CPU0 System Tick Calibration
- Cpu0stckcal
- Secure CPU0 System Tick Calibration
- Cpu1stckcal
- System tick calibration for CPU1
- Cpuctrl
- CPU Control for Multiple Processors
- Cpustat
- CPU Status
- Ctimerclkdiv
- CTimer Clock Divider
- Ctimerclksel
- CTIMER Clock Source Select
- Ctimerglobalstarten
- CTIMER Global Start Enable
- Dac0clkdiv
- DAC0 functional clock divider
- Dac0clksel
- DAC0 Functional Clock Selection
- Dac1clkdiv
- DAC1 functional clock divider
- Dac1clksel
- DAC1 Functional Clock Selection
- Dac2clkdiv
- DAC2 functional clock divider
- Dac2clksel
- DAC2 Functional Clock Selection
- Debug
Auth Beacon - Debug Authentication BEACON
- Debug
Features - Cortex Debug Features Control
- Debug
Features Dp - Cortex Debug Features Control (Duplicate)
- Debug
Lock En - Control Write Access to Security
- Device
Id0 - Device ID
- Device
Type - Device Type
- Dieid
- Chip Revision ID and Number
- EccEnable
Ctrl - RAM ECC Enable Control
- ElsAs
Boot Log0 - Boot state captured during boot: Main ROM log
- ElsAs
Boot Log1 - Boot state captured during boot: Library log
- ElsAs
Boot Log2 - Boot state captured during boot: Hardware status signals log
- ElsAs
Boot Log3 - Boot state captured during boot: Security log
- ElsAs
Cfg0 - ELS AS Configuration
- ElsAs
Cfg1 - ELS AS Configuration1
- ElsAs
Cfg2 - ELS AS Configuration2
- ElsAs
Cfg3 - ELS AS Configuration3
- ElsAs
Flag0 - ELS AS Flag0
- ElsAs
Flag1 - ELS AS Flag1
- ElsAs
St0 - ELS AS State Register
- ElsAs
St1 - ELS AS State1
- ElsAsset
Prot - ELS Asset Protection Register
- ElsKdf
Mask - Key Derivation Function Mask
- ElsLock
Ctrl - ELS Lock Control
- ElsLock
Ctrl Dp - ELS Lock Control DP
- ElsOtp
LcState - Life Cycle State Register
- ElsOtp
LcState Dp - Life Cycle State Register (Duplicate)
- ElsTemporal
State - ELS Temporal State
- Emvsim0clkdiv
- EMVSIM0 Function Clock Division
- Emvsim0clksel
- EMVSIM0 Clock Source Select
- Emvsim1clkdiv
- EMVSIM1 Function Clock Division
- Emvsim1clksel
- EMVSIM1 Clock Source Select
- Enet
PhyIntf Sel - Ethernet PHY Interface Select
- Enet
SbdFlow Ctrl - Sideband Flow Control
- Enetptprefclkdiv
- Ethernet PTP REF Function Clock Divider
- Enetptprefclksel
- Ethernet PTP REF Clock Selection
- Enetrmiiclkdiv
- Ethernet RMII Function Clock Divider
- Enetrmiiclksel
- Ethernet RMII Clock Selection
- EtbCounter
Ctrl - ETB Counter Control Register
- EtbCounter
Reload - ETB Counter Reload Register
- EtbCounter
Value - ETB Counter Value Register
- EtbStatus
- ETB Counter Status Register
- Ewm0clksel
- EWM0 Clock Selection
- Fcclksel
- LP_FLEXCOMM Clock Source Select for Fractional Rate Divider
- Flex
Spiclkdiv - FlexSPI Clock Divider
- Flex
Spiclksel - FlexSPI Clock Selection
- Flexcan0clkdiv
- FLEXCAN0 Function Clock Divider
- Flexcan0clksel
- FLEXCAN0 Clock Selection
- Flexcan1clkdiv
- FLEXCAN1 Function Clock Divider
- Flexcan1clksel
- FLEXCAN1 Clock Selection
- Flexcommclkdiv
- LP_FLEXCOMM Clock Divider
- Flexioclkdiv
- FLEXIO Function Clock Divider
- Flexioclksel
- FLEXIO Clock Selection
- Frohfdiv
- FRO_HF_DIV Clock Divider
- Gdet
Ctrl - GDET Control Register
- Gray
Code Lsb - Gray to Binary Converter Gray code_gray[31:0]
- Gray
Code Msb - Gray to Binary Converter Gray code_gray[41:32]
- I3c0fclkdiv
- I3C0 Functional Clock FCLK Divider
- I3c0fclksdiv
- I3C0 FCLK Slow Clock Divider
- I3c0fclksel
- I3C0 Functional Clock Selection
- I3c0fclkssel
- I3C0 FCLK Slow Selection
- I3c0fclkstcdiv
- I3C0 FCLK_STC Clock Divider
- I3c0fclkstcsel
- I3C0 FCLK_STC Clock Selection
- I3c1fclkdiv
- I3C1 Functional Clock FCLK Divider
- I3c1fclksdiv
- I3C1 FCLK Slow clock Divider
- I3c1fclksel
- I3C1 Functional Clock Selection
- I3c1fclkssel
- I3C1 FCLK Slow Selection
- I3c1fclkstcdiv
- I3C1 FCLK_STC Clock Divider
- I3c1fclkstcsel
- Selects the I3C1 Time Control clock
- JtagId
- JTAG Chip ID
- KeyRetain
Ctrl - Key Retain Control
- Lpcac
Ctrl - LPCAC Control
- Micfilfclkdiv
- MICFIL Clock Division
- Micfilfclksel
- MICFIL Clock Selection
- Nmisrc
- NMI Source Select
- NvmCtrl
- NVM Control
- Ostimerclksel
- OSTIMER Clock Selection
- Pll1clk0div
- PLL1 Clock 0 Divider
- Pll1clk1div
- PLL1 Clock 1 Divider
- Pllclkdiv
- PLL Clock Divider
- Pllclkdivsel
- PLL Clock Divider Clock Selection
- Presetctrl0
- Peripheral Reset Control 0
- Presetctrl1
- Peripheral Reset Control 1
- Presetctrl2
- Peripheral Reset Control 2
- Presetctrl3
- Peripheral Reset Control 3
- Presetctrlclr
- Peripheral Reset Control Clear
- Presetctrlset
- Peripheral Reset Control Set
- Pwm0subctl
- PWM0 Submodule Control
- Pwm1subctl
- PWM1 Submodule Control
- RamInterleave
- Control PKC RAM Interleave Access
- RefClk
Ctrl - FRO 48MHz Reference Clock Control
- RefClk
Ctrl Clr - FRO 48MHz Reference Clock Control Clear
- RefClk
Ctrl Set - FRO 48MHz Reference Clock Control Set
- Romcr
- ROM Wait State
- Sai0clkdiv
- SAI0 Function Clock Division
- Sai0clksel
- SAI0 Function Clock Source Select
- Sai1clkdiv
- SAI1 Function Clock Division
- Sai1clksel
- SAI1 Function Clock Source Select
- Sctclkdiv
- SCT/PWM Clock Divider
- Sctclksel
- SCTimer/PWM Clock Source Select
- Sincfiltclksel
- SINC FILTER Function Clock Source Select
- Slowclkdiv
- SLOW_CLK Clock Divider
- Smart
Dmaint - SmartDMA Interrupt Hijack
- SwdAccess
Cpu0 - CPU0 Software Debug Access
- SwdAccess
Cpu1 - CPU1 Software Debug Access
- SwdAccess
Dsp - DSP Software Debug Access
- Systickclkdiv0
- CPU0 System Tick Timer Divider
- Systickclkdiv1
- CPU1 System Tick Timer Divider
- Systickclksel0
- CPU0 System Tick Timer Source Select
- Systickclksel1
- CPU1 System Tick Timer Source Select
- Traceclkdiv
- TRACE Clock Divider
- Traceclksel
- Trace Clock Source Select
- Tsiclkdiv
- TSI Function Clock Divider
- Tsiclksel
- TSI Function Clock Source Select
- USdhcclkdiv
- uSDHC Function Clock Divider
- USdhcclksel
- uSDHC Clock Selection
- Usb0clkdiv
- USB-FS Clock Divider
- Usb0clksel
- USB-FS Clock Source Select
- Utickclkdiv
- UTICK Clock Divider
- Utickclksel
- UTICK Function Clock Source Select
- Wdt0clkdiv
- WDT0 Clock Divider
- Wdt1clkdiv
- WDT1 Function Clock Divider
- Wdt1clksel
- WDT1 Clock Selection