#[repr(transparent)]pub struct ElsAsSt0(pub u32);Expand description
ELS AS State Register
Tuple Fields§
§0: u32Implementations§
Source§impl ElsAsSt0
impl ElsAsSt0
Sourcepub const fn st_temporal_state(&self) -> u8
pub const fn st_temporal_state(&self) -> u8
TEMPORAL_STATE[3:0] in the ELS_TEMPORAL_STATE register reflects this register
Sourcepub const fn set_st_temporal_state(&mut self, val: u8)
pub const fn set_st_temporal_state(&mut self, val: u8)
TEMPORAL_STATE[3:0] in the ELS_TEMPORAL_STATE register reflects this register
Sourcepub const fn st_cpu0_dbgen(&self) -> bool
pub const fn st_cpu0_dbgen(&self) -> bool
When CPU0 (CM33) “deben” input is state 1, this bit indicates state 1
Sourcepub const fn set_st_cpu0_dbgen(&mut self, val: bool)
pub const fn set_st_cpu0_dbgen(&mut self, val: bool)
When CPU0 (CM33) “deben” input is state 1, this bit indicates state 1
Sourcepub const fn st_cpu0_niden(&self) -> bool
pub const fn st_cpu0_niden(&self) -> bool
When CPU0 (CM33) “niden” input is state 1, this bit indicates state 1
Sourcepub const fn set_st_cpu0_niden(&mut self, val: bool)
pub const fn set_st_cpu0_niden(&mut self, val: bool)
When CPU0 (CM33) “niden” input is state 1, this bit indicates state 1
Sourcepub const fn st_cpu0_spiden(&self) -> bool
pub const fn st_cpu0_spiden(&self) -> bool
When CPU0 (CM33) “spiden” input is state 1, this bit indicates state 1
Sourcepub const fn set_st_cpu0_spiden(&mut self, val: bool)
pub const fn set_st_cpu0_spiden(&mut self, val: bool)
When CPU0 (CM33) “spiden” input is state 1, this bit indicates state 1
Sourcepub const fn st_cpu0_spniden(&self) -> bool
pub const fn st_cpu0_spniden(&self) -> bool
When CPU0 (CM33) “spniden” input is state 1, this bit indicates state 1
Sourcepub const fn set_st_cpu0_spniden(&mut self, val: bool)
pub const fn set_st_cpu0_spniden(&mut self, val: bool)
When CPU0 (CM33) “spniden” input is state 1, this bit indicates state 1
Sourcepub const fn st_cpu1_dbgen(&self) -> bool
pub const fn st_cpu1_dbgen(&self) -> bool
When CPU1 (CM33) “deben” input is state 1, this bit indicates state 1.
Sourcepub const fn set_st_cpu1_dbgen(&mut self, val: bool)
pub const fn set_st_cpu1_dbgen(&mut self, val: bool)
When CPU1 (CM33) “deben” input is state 1, this bit indicates state 1.
Sourcepub const fn st_cpu1_niden(&self) -> bool
pub const fn st_cpu1_niden(&self) -> bool
When CPU1 (CM33) “niden” input is state 1, this bit indicates state 1.
Sourcepub const fn set_st_cpu1_niden(&mut self, val: bool)
pub const fn set_st_cpu1_niden(&mut self, val: bool)
When CPU1 (CM33) “niden” input is state 1, this bit indicates state 1.
Sourcepub const fn st_dap_enable_cpu0(&self) -> bool
pub const fn st_dap_enable_cpu0(&self) -> bool
When DAP to AP0 for CPU0 (CM33) debug access is allowed, this bit indicates state 1
Sourcepub const fn set_st_dap_enable_cpu0(&mut self, val: bool)
pub const fn set_st_dap_enable_cpu0(&mut self, val: bool)
When DAP to AP0 for CPU0 (CM33) debug access is allowed, this bit indicates state 1
Sourcepub const fn st_dap_enable_cpu1(&self) -> bool
pub const fn st_dap_enable_cpu1(&self) -> bool
When DAP to AP1 for CPU1 (CM33) debug access is allowed, this bit indicates state 1.
Sourcepub const fn set_st_dap_enable_cpu1(&mut self, val: bool)
pub const fn set_st_dap_enable_cpu1(&mut self, val: bool)
When DAP to AP1 for CPU1 (CM33) debug access is allowed, this bit indicates state 1.
Sourcepub const fn st_dap_enable_dsp(&self) -> bool
pub const fn st_dap_enable_dsp(&self) -> bool
When DAP to AP3 for DSP (CoolFlux) debug access is allowed, this bit indicates state 1
Sourcepub const fn set_st_dap_enable_dsp(&mut self, val: bool)
pub const fn set_st_dap_enable_dsp(&mut self, val: bool)
When DAP to AP3 for DSP (CoolFlux) debug access is allowed, this bit indicates state 1
Sourcepub const fn st_allow_test_access(&self) -> bool
pub const fn st_allow_test_access(&self) -> bool
When JTAG TAP access is allowed, this bit indicates state 1.
Sourcepub const fn set_st_allow_test_access(&mut self, val: bool)
pub const fn set_st_allow_test_access(&mut self, val: bool)
When JTAG TAP access is allowed, this bit indicates state 1.
Sourcepub const fn st_xo32k_failed(&self) -> bool
pub const fn st_xo32k_failed(&self) -> bool
When XO32K oscillation fail flag is state 1, this bit indicates state 1
Sourcepub const fn set_st_xo32k_failed(&mut self, val: bool)
pub const fn set_st_xo32k_failed(&mut self, val: bool)
When XO32K oscillation fail flag is state 1, this bit indicates state 1
Sourcepub const fn st_xo40m_failed(&self) -> bool
pub const fn st_xo40m_failed(&self) -> bool
When XO40M oscillation fail flag is state 1, this bit indicates state 1
Sourcepub const fn set_st_xo40m_failed(&mut self, val: bool)
pub const fn set_st_xo40m_failed(&mut self, val: bool)
When XO40M oscillation fail flag is state 1, this bit indicates state 1
Sourcepub const fn st_ifr_load_failed(&self) -> bool
pub const fn st_ifr_load_failed(&self) -> bool
When IFR load fail flag is state 1, this bit indicates state 1
Sourcepub const fn set_st_ifr_load_failed(&mut self, val: bool)
pub const fn set_st_ifr_load_failed(&mut self, val: bool)
When IFR load fail flag is state 1, this bit indicates state 1
Sourcepub const fn st_glitch_detect_flag(&self) -> u8
pub const fn st_glitch_detect_flag(&self) -> u8
GLITCH_DETECT_FLAG is state of 4-bit Glitch Ripple Counter output.
Sourcepub const fn set_st_glitch_detect_flag(&mut self, val: u8)
pub const fn set_st_glitch_detect_flag(&mut self, val: u8)
GLITCH_DETECT_FLAG is state of 4-bit Glitch Ripple Counter output.