#[repr(transparent)]pub struct Trig1Chain54(pub u32);Expand description
ETC_TRIG Chain 4/5 Register
Tuple Fields§
§0: u32Implementations§
Source§impl Trig1Chain54
impl Trig1Chain54
Sourcepub const fn csel4(&self) -> Trig1Chain54Csel4
pub const fn csel4(&self) -> Trig1Chain54Csel4
ADC channel selection
Sourcepub const fn set_csel4(&mut self, val: Trig1Chain54Csel4)
pub const fn set_csel4(&mut self, val: Trig1Chain54Csel4)
ADC channel selection
Sourcepub const fn hwts4(&self) -> Trig1Chain54Hwts4
pub const fn hwts4(&self) -> Trig1Chain54Hwts4
Segment 4 HWTS ADC hardware trigger selection
Sourcepub const fn set_hwts4(&mut self, val: Trig1Chain54Hwts4)
pub const fn set_hwts4(&mut self, val: Trig1Chain54Hwts4)
Segment 4 HWTS ADC hardware trigger selection
Sourcepub const fn b2b4(&self) -> Trig1Chain54B2b4
pub const fn b2b4(&self) -> Trig1Chain54B2b4
Segment 4 B2B
Sourcepub const fn set_b2b4(&mut self, val: Trig1Chain54B2b4)
pub const fn set_b2b4(&mut self, val: Trig1Chain54B2b4)
Segment 4 B2B
Sourcepub const fn ie4(&self) -> Trig1Chain54Ie4
pub const fn ie4(&self) -> Trig1Chain54Ie4
Segment 4 interrupt enable. (This bit field is meaningful only when IE4_EN is set)
Sourcepub const fn set_ie4(&mut self, val: Trig1Chain54Ie4)
pub const fn set_ie4(&mut self, val: Trig1Chain54Ie4)
Segment 4 interrupt enable. (This bit field is meaningful only when IE4_EN is set)
Sourcepub const fn ie4_en(&self) -> Trig1Chain54Ie4En
pub const fn ie4_en(&self) -> Trig1Chain54Ie4En
IRQ enable of segment 4.
Sourcepub const fn set_ie4_en(&mut self, val: Trig1Chain54Ie4En)
pub const fn set_ie4_en(&mut self, val: Trig1Chain54Ie4En)
IRQ enable of segment 4.
Sourcepub const fn csel5(&self) -> Trig1Chain54Csel5
pub const fn csel5(&self) -> Trig1Chain54Csel5
ADC channel selection
Sourcepub const fn set_csel5(&mut self, val: Trig1Chain54Csel5)
pub const fn set_csel5(&mut self, val: Trig1Chain54Csel5)
ADC channel selection
Sourcepub const fn hwts5(&self) -> Trig1Chain54Hwts5
pub const fn hwts5(&self) -> Trig1Chain54Hwts5
Segment 5 HWTS ADC hardware trigger selection
Sourcepub const fn set_hwts5(&mut self, val: Trig1Chain54Hwts5)
pub const fn set_hwts5(&mut self, val: Trig1Chain54Hwts5)
Segment 5 HWTS ADC hardware trigger selection
Sourcepub const fn b2b5(&self) -> Trig1Chain54B2b5
pub const fn b2b5(&self) -> Trig1Chain54B2b5
Segment 5 B2B
Sourcepub const fn set_b2b5(&mut self, val: Trig1Chain54B2b5)
pub const fn set_b2b5(&mut self, val: Trig1Chain54B2b5)
Segment 5 B2B
Sourcepub const fn ie5(&self) -> Trig1Chain54Ie5
pub const fn ie5(&self) -> Trig1Chain54Ie5
Segment 5 interrupt enable. (This bit field is meaningful only when IE5_EN is set)
Sourcepub const fn set_ie5(&mut self, val: Trig1Chain54Ie5)
pub const fn set_ie5(&mut self, val: Trig1Chain54Ie5)
Segment 5 interrupt enable. (This bit field is meaningful only when IE5_EN is set)
Sourcepub const fn ie5_en(&self) -> Trig1Chain54Ie5En
pub const fn ie5_en(&self) -> Trig1Chain54Ie5En
IRQ enable of segment 5.
Sourcepub const fn set_ie5_en(&mut self, val: Trig1Chain54Ie5En)
pub const fn set_ie5_en(&mut self, val: Trig1Chain54Ie5En)
IRQ enable of segment 5.
Trait Implementations§
Source§impl Clone for Trig1Chain54
impl Clone for Trig1Chain54
Source§fn clone(&self) -> Trig1Chain54
fn clone(&self) -> Trig1Chain54
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more