#[repr(transparent)]pub struct Cdcdr(pub u32);Expand description
CCM D1 Clock Divider Register
Tuple Fields§
§0: u32Implementations§
Source§impl Cdcdr
impl Cdcdr
Sourcepub const fn spdif0_clk_sel(&self) -> Spdif0ClkSel
pub const fn spdif0_clk_sel(&self) -> Spdif0ClkSel
Selector for spdif0 clock multiplexer
Sourcepub const fn set_spdif0_clk_sel(&mut self, val: Spdif0ClkSel)
pub const fn set_spdif0_clk_sel(&mut self, val: Spdif0ClkSel)
Selector for spdif0 clock multiplexer
Sourcepub const fn spdif0_clk_podf(&self) -> Spdif0ClkPodf
pub const fn spdif0_clk_podf(&self) -> Spdif0ClkPodf
Divider for spdif0 clock podf. Divider should be updated when output clock is gated.
Sourcepub const fn set_spdif0_clk_podf(&mut self, val: Spdif0ClkPodf)
pub const fn set_spdif0_clk_podf(&mut self, val: Spdif0ClkPodf)
Divider for spdif0 clock podf. Divider should be updated when output clock is gated.
Sourcepub const fn spdif0_clk_pred(&self) -> Spdif0ClkPred
pub const fn spdif0_clk_pred(&self) -> Spdif0ClkPred
Divider for spdif0 clock pred. Divider should be updated when output clock is gated.
Sourcepub const fn set_spdif0_clk_pred(&mut self, val: Spdif0ClkPred)
pub const fn set_spdif0_clk_pred(&mut self, val: Spdif0ClkPred)
Divider for spdif0 clock pred. Divider should be updated when output clock is gated.
Trait Implementations§
impl Copy for Cdcdr
impl Eq for Cdcdr
impl StructuralPartialEq for Cdcdr
Auto Trait Implementations§
impl Freeze for Cdcdr
impl RefUnwindSafe for Cdcdr
impl Send for Cdcdr
impl Sync for Cdcdr
impl Unpin for Cdcdr
impl UnwindSafe for Cdcdr
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more