Module regs
Source - Cdne
- Clear DONE Status Bit
- Ceei
- Clear Enable Error Interrupt
- Cerq
- Clear Enable Request
- Cerr
- Clear Error
- Cint
- Clear Interrupt Request
- Cr
- Control
- Dchpri
- Channel Priority
- Ears
- Enable Asynchronous Request in Stop
- Eei
- Enable Error Interrupt
- Erq
- Enable Request
- Err
- Error
- Es
- Error Status
- Hrs
- Hardware Request Status
- Int
- Interrupt Request
- Seei
- Set Enable Error Interrupt
- Serq
- Set Enable Request
- Ssrt
- Set START Bit
- TcdAttr
- TCD Transfer Attributes
- TcdBiterElinkno
- TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)
- TcdBiterElinkyes
- TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)
- TcdCiterElinkno
- TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)
- TcdCiterElinkyes
- TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)
- TcdCsr
- TCD Control and Status
- TcdDaddr
- TCD Destination Address
- TcdDlastsga
- TCD Last Destination Address Adjustment/Scatter Gather Address
- TcdDoff
- TCD Signed Destination Address Offset
- TcdNbytesMlno
- TCD Minor Byte Count (Minor Loop Mapping Disabled)
- TcdNbytesMloffno
- TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)
- TcdNbytesMloffyes
- TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)
- TcdSaddr
- TCD Source Address
- TcdSlast
- TCD Last Source Address Adjustment
- TcdSoff
- TCD Signed Source Address Offset