Struct Iomuxc 

pub struct Iomuxc { /* private fields */ }

IOMUXC

Implementations

impl Iomuxc

pub const unsafe fn from_ptr(ptr: *mut ()) -> Self

pub const fn as_ptr(&self) -> *mut ()

pub const fn sw_mux_ctl_pad_gpio_ad_14(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_14 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_13(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_13 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_12(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_12 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_11(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_11 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_10(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_10 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_09(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_09 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_08(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_08 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_07(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_07 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_06(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_06 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_05(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_05 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_04(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_04 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_03(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_03 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_02(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_02 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_01(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_01 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_ad_00(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_AD_00 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_14(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_14 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_13(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_13 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_12(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_12 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_11(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_11 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_10(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_10 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_09(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_09 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_08(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_08 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_07(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_07 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_06(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_06 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_05(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_05 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_04(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_04 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_03(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_03 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_02(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_02 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_01(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_01 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_sd_00(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_SD_00 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_13(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_13 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_12(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_12 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_11(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_11 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_10(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_10 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_09(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_09 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_08(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_08 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_07(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_07 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_06(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_06 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_05(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_05 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_04(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_04 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_03(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_03 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_02(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_02 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_01(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_01 SW MUX Control Register

pub const fn sw_mux_ctl_pad_gpio_00(self) -> Reg<MuxCtl, RW>

SW_MUX_CTL_PAD_GPIO_00 SW MUX Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_14(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_14 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_13(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_13 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_12(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_12 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_11(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_11 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_10(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_10 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_09(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_09 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_08(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_08 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_07(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_07 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_06(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_06 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_05(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_05 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_04(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_04 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_03(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_03 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_02(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_02 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_01(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_01 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_ad_00(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_AD_00 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_14(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_14 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_13(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_13 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_12(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_12 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_11(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_11 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_10(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_10 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_09(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_09 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_08(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_08 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_07(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_07 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_06(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_06 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_05(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_05 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_04(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_04 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_03(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_03 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_02(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_02 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_01(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_01 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_sd_00(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_SD_00 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_13(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_13 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_12(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_12 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_11(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_11 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_10(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_10 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_09(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_09 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_08(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_08 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_07(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_07 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_06(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_06 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_05(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_05 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_04(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_04 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_03(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_03 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_02(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_02 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_01(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_01 SW PAD Control Register

pub const fn sw_pad_ctl_pad_gpio_00(self) -> Reg<Ctl, RW>

SW_PAD_CTL_PAD_GPIO_00 SW PAD Control Register

pub const fn usb_otg_id_select_input(self) -> Reg<UsbOtgIdSelectInput, RW>

USB_OTG_ID_SELECT_INPUT DAISY Register

pub const fn flexpwm1_pwma_select_input_0( self, ) -> Reg<Flexpwm1PwmaSelectInput0, RW>

FLEXPWM1_PWMA_SELECT_INPUT_0 DAISY Register

pub const fn flexpwm1_pwma_select_input_1( self, ) -> Reg<Flexpwm1PwmaSelectInput1, RW>

FLEXPWM1_PWMA_SELECT_INPUT_1 DAISY Register

pub const fn flexpwm1_pwma_select_input_2( self, ) -> Reg<Flexpwm1PwmaSelectInput2, RW>

FLEXPWM1_PWMA_SELECT_INPUT_2 DAISY Register

pub const fn flexpwm1_pwma_select_input_3( self, ) -> Reg<Flexpwm1PwmaSelectInput3, RW>

FLEXPWM1_PWMA_SELECT_INPUT_3 DAISY Register

pub const fn flexpwm1_pwmb_select_input_0( self, ) -> Reg<Flexpwm1PwmbSelectInput0, RW>

FLEXPWM1_PWMB_SELECT_INPUT_0 DAISY Register

pub const fn flexpwm1_pwmb_select_input_1( self, ) -> Reg<Flexpwm1PwmbSelectInput1, RW>

FLEXPWM1_PWMB_SELECT_INPUT_1 DAISY Register

pub const fn flexpwm1_pwmb_select_input_2( self, ) -> Reg<Flexpwm1PwmbSelectInput2, RW>

FLEXPWM1_PWMB_SELECT_INPUT_2 DAISY Register

pub const fn flexpwm1_pwmb_select_input_3( self, ) -> Reg<Flexpwm1PwmbSelectInput3, RW>

FLEXPWM1_PWMB_SELECT_INPUT_3 DAISY Register

pub const fn flexspi_dqs_fa_select_input( self, ) -> Reg<FlexspiDqsFaSelectInput, RW>

FLEXSPI_DQS_FA_SELECT_INPUT DAISY Register

pub const fn flexspi_dqs_fb_select_input( self, ) -> Reg<FlexspiDqsFbSelectInput, RW>

FLEXSPI_DQS_FB_SELECT_INPUT DAISY Register

pub const fn kpp_col_select_input_0(self) -> Reg<KppColSelectInput0, RW>

KPP_COL_SELECT_INPUT_0 DAISY Register

pub const fn kpp_col_select_input_1(self) -> Reg<KppColSelectInput1, RW>

KPP_COL_SELECT_INPUT_1 DAISY Register

pub const fn kpp_col_select_input_2(self) -> Reg<KppColSelectInput2, RW>

KPP_COL_SELECT_INPUT_2 DAISY Register

pub const fn kpp_col_select_input_3(self) -> Reg<KppColSelectInput3, RW>

KPP_COL_SELECT_INPUT_3 DAISY Register

pub const fn kpp_row_select_input_0(self) -> Reg<KppRowSelectInput0, RW>

KPP_ROW_SELECT_INPUT_0 DAISY Register

pub const fn kpp_row_select_input_1(self) -> Reg<KppRowSelectInput1, RW>

KPP_ROW_SELECT_INPUT_1 DAISY Register

pub const fn kpp_row_select_input_2(self) -> Reg<KppRowSelectInput2, RW>

KPP_ROW_SELECT_INPUT_2 DAISY Register

pub const fn kpp_row_select_input_3(self) -> Reg<KppRowSelectInput3, RW>

KPP_ROW_SELECT_INPUT_3 DAISY Register

pub const fn lpi2c1_hreq_select_input(self) -> Reg<Lpi2c1HreqSelectInput, RW>

LPI2C1_HREQ_SELECT_INPUT DAISY Register

pub const fn lpi2c1_scl_select_input(self) -> Reg<Lpi2c1SclSelectInput, RW>

LPI2C1_SCL_SELECT_INPUT DAISY Register

pub const fn lpi2c1_sda_select_input(self) -> Reg<Lpi2c1SdaSelectInput, RW>

LPI2C1_SDA_SELECT_INPUT DAISY Register

pub const fn lpi2c2_scl_select_input(self) -> Reg<Lpi2c2SclSelectInput, RW>

LPI2C2_SCL_SELECT_INPUT DAISY Register

pub const fn lpi2c2_sda_select_input(self) -> Reg<Lpi2c2SdaSelectInput, RW>

LPI2C2_SDA_SELECT_INPUT DAISY Register

pub const fn lpspi1_pcs_select_input_0(self) -> Reg<Lpspi1PcsSelectInput0, RW>

LPSPI1_PCS_SELECT_INPUT_0 DAISY Register

pub const fn lpspi1_sck_select_input(self) -> Reg<Lpspi1SckSelectInput, RW>

LPSPI1_SCK_SELECT_INPUT DAISY Register

pub const fn lpspi1_sdi_select_input(self) -> Reg<Lpspi1SdiSelectInput, RW>

LPSPI1_SDI_SELECT_INPUT DAISY Register

pub const fn lpspi1_sdo_select_input(self) -> Reg<Lpspi1SdoSelectInput, RW>

LPSPI1_SDO_SELECT_INPUT DAISY Register

pub const fn lpspi2_pcs_select_input_0(self) -> Reg<Lpspi2PcsSelectInput0, RW>

LPSPI2_PCS_SELECT_INPUT_0 DAISY Register

pub const fn lpspi2_sck_select_input(self) -> Reg<Lpspi2SckSelectInput, RW>

LPSPI2_SCK_SELECT_INPUT DAISY Register

pub const fn lpspi2_sdi_select_input(self) -> Reg<Lpspi2SdiSelectInput, RW>

LPSPI2_SDI_SELECT_INPUT DAISY Register

pub const fn lpspi2_sdo_select_input(self) -> Reg<Lpspi2SdoSelectInput, RW>

LPSPI2_SDO_SELECT_INPUT DAISY Register

pub const fn lpuart1_rxd_select_input(self) -> Reg<Lpuart1RxdSelectInput, RW>

LPUART1_RXD_SELECT_INPUT DAISY Register

pub const fn lpuart1_txd_select_input(self) -> Reg<Lpuart1TxdSelectInput, RW>

LPUART1_TXD_SELECT_INPUT DAISY Register

pub const fn lpuart2_rxd_select_input(self) -> Reg<Lpuart2RxdSelectInput, RW>

LPUART2_RXD_SELECT_INPUT DAISY Register

pub const fn lpuart2_txd_select_input(self) -> Reg<Lpuart2TxdSelectInput, RW>

LPUART2_TXD_SELECT_INPUT DAISY Register

pub const fn lpuart3_rxd_select_input(self) -> Reg<Lpuart3RxdSelectInput, RW>

LPUART3_RXD_SELECT_INPUT DAISY Register

pub const fn lpuart3_txd_select_input(self) -> Reg<Lpuart3TxdSelectInput, RW>

LPUART3_TXD_SELECT_INPUT DAISY Register

pub const fn lpuart4_rxd_select_input(self) -> Reg<Lpuart4RxdSelectInput, RW>

LPUART4_RXD_SELECT_INPUT DAISY Register

pub const fn lpuart4_txd_select_input(self) -> Reg<Lpuart4TxdSelectInput, RW>

LPUART4_TXD_SELECT_INPUT DAISY Register

pub const fn nmi_glue_nmi_select_input(self) -> Reg<NmiGlueNmiSelectInput, RW>

NMI_GLUE_NMI_SELECT_INPUT DAISY Register

pub const fn spdif_in1_select_input(self) -> Reg<SpdifIn1SelectInput, RW>

SPDIF_IN1_SELECT_INPUT DAISY Register

pub const fn spdif_tx_clk2_select_input(self) -> Reg<SpdifTxClk2SelectInput, RW>

SPDIF_TX_CLK2_SELECT_INPUT DAISY Register

pub const fn usb_otg_oc_select_input(self) -> Reg<UsbOtgOcSelectInput, RW>

USB_OTG_OC_SELECT_INPUT DAISY Register

pub const fn xev_glue_rxev_select_input(self) -> Reg<XevGlueRxevSelectInput, RW>

XEV_GLUE_RXEV_SELECT_INPUT DAISY Register

Trait Implementations

impl Clone for Iomuxc

fn clone(&self) -> Iomuxc

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for Iomuxc

fn eq(&self, other: &Iomuxc) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Iomuxc

impl Eq for Iomuxc

impl Send for Iomuxc

impl StructuralPartialEq for Iomuxc

impl Sync for Iomuxc