#[repr(transparent)]pub struct Cscdr2(pub u32);Expand description
CCM Serial Clock Divider Register 2.
Tuple Fields§
§0: u32Implementations§
Source§impl Cscdr2
impl Cscdr2
Sourcepub const fn lcdif_pred(&self) -> LcdifPred
pub const fn lcdif_pred(&self) -> LcdifPred
Pre-divider for lcdif clock. Divider should be updated when output clock is gated.
Sourcepub const fn set_lcdif_pred(&mut self, val: LcdifPred)
pub const fn set_lcdif_pred(&mut self, val: LcdifPred)
Pre-divider for lcdif clock. Divider should be updated when output clock is gated.
Sourcepub const fn lcdif_pre_clk_sel(&self) -> LcdifPreClkSel
pub const fn lcdif_pre_clk_sel(&self) -> LcdifPreClkSel
Selector for lcdif root clock pre-multiplexer.
Sourcepub const fn set_lcdif_pre_clk_sel(&mut self, val: LcdifPreClkSel)
pub const fn set_lcdif_pre_clk_sel(&mut self, val: LcdifPreClkSel)
Selector for lcdif root clock pre-multiplexer.
Sourcepub const fn lpi2c_clk_sel(&self) -> Lpi2cClkSel
pub const fn lpi2c_clk_sel(&self) -> Lpi2cClkSel
Selector for the LPI2C clock multiplexor.
Sourcepub const fn set_lpi2c_clk_sel(&mut self, val: Lpi2cClkSel)
pub const fn set_lpi2c_clk_sel(&mut self, val: Lpi2cClkSel)
Selector for the LPI2C clock multiplexor.
Sourcepub const fn lpi2c_clk_podf(&self) -> Lpi2cClkPodf
pub const fn lpi2c_clk_podf(&self) -> Lpi2cClkPodf
Divider for lpi2c clock podf. Divider should be updated when output clock is gated. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.
Sourcepub const fn set_lpi2c_clk_podf(&mut self, val: Lpi2cClkPodf)
pub const fn set_lpi2c_clk_podf(&mut self, val: Lpi2cClkPodf)
Divider for lpi2c clock podf. Divider should be updated when output clock is gated. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.