#[repr(u8)]pub enum Om3 {
DISABLED = 0,
TOGGLE = 1,
CLEAR = 2,
SET = 3,
PULSE = 4,
_RESERVED_5 = 5,
_RESERVED_6 = 6,
_RESERVED_7 = 7,
}Variants§
DISABLED = 0
Output disabled. No response on pin.
TOGGLE = 1
Toggle output pin
CLEAR = 2
Clear output pin
SET = 3
Set output pin
PULSE = 4
Generate a low pulse that is one input clock cycle wide on the output pin. When OMn is first programmed as 1xx, the output pin is set to one immediately on the next input clock (if it was not one already). “Input clock” here refers to the clock selected by the CLKSRC field of this register.
_RESERVED_5 = 5
_RESERVED_6 = 6
_RESERVED_7 = 7
Implementations§
Trait Implementations§
Source§impl Ord for Om3
impl Ord for Om3
Source§impl PartialOrd for Om3
impl PartialOrd for Om3
impl Copy for Om3
impl Eq for Om3
impl StructuralPartialEq for Om3
Auto Trait Implementations§
impl Freeze for Om3
impl RefUnwindSafe for Om3
impl Send for Om3
impl Sync for Om3
impl Unpin for Om3
impl UnwindSafe for Om3
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more