#[repr(transparent)]pub struct Misc2Clr(pub u32);Expand description
Miscellaneous Control Register
Tuple Fields§
§0: u32Implementations§
Source§impl Misc2Clr
impl Misc2Clr
Sourcepub const fn reg0_bo_offset(&self) -> Misc2ClrReg0BoOffset
pub const fn reg0_bo_offset(&self) -> Misc2ClrReg0BoOffset
This field defines the brown out voltage offset for the CORE power domain
Sourcepub const fn set_reg0_bo_offset(&mut self, val: Misc2ClrReg0BoOffset)
pub const fn set_reg0_bo_offset(&mut self, val: Misc2ClrReg0BoOffset)
This field defines the brown out voltage offset for the CORE power domain
Sourcepub const fn reg0_bo_status(&self) -> bool
pub const fn reg0_bo_status(&self) -> bool
Reg0 brownout status bit.
Sourcepub const fn set_reg0_bo_status(&mut self, val: bool)
pub const fn set_reg0_bo_status(&mut self, val: bool)
Reg0 brownout status bit.
Sourcepub const fn reg0_enable_bo(&self) -> bool
pub const fn reg0_enable_bo(&self) -> bool
Enables the brownout detection.
Sourcepub const fn set_reg0_enable_bo(&mut self, val: bool)
pub const fn set_reg0_enable_bo(&mut self, val: bool)
Enables the brownout detection.
Sourcepub const fn pll3_disable(&self) -> bool
pub const fn pll3_disable(&self) -> bool
Default value of “0”
Sourcepub const fn set_pll3_disable(&mut self, val: bool)
pub const fn set_pll3_disable(&mut self, val: bool)
Default value of “0”
Sourcepub const fn reg1_bo_offset(&self) -> Misc2ClrReg1BoOffset
pub const fn reg1_bo_offset(&self) -> Misc2ClrReg1BoOffset
This field defines the brown out voltage offset for the xPU power domain
Sourcepub const fn set_reg1_bo_offset(&mut self, val: Misc2ClrReg1BoOffset)
pub const fn set_reg1_bo_offset(&mut self, val: Misc2ClrReg1BoOffset)
This field defines the brown out voltage offset for the xPU power domain
Sourcepub const fn reg1_bo_status(&self) -> bool
pub const fn reg1_bo_status(&self) -> bool
Reg1 brownout status bit.
Sourcepub const fn set_reg1_bo_status(&mut self, val: bool)
pub const fn set_reg1_bo_status(&mut self, val: bool)
Reg1 brownout status bit.
Sourcepub const fn reg1_enable_bo(&self) -> bool
pub const fn reg1_enable_bo(&self) -> bool
Enables the brownout detection.
Sourcepub const fn set_reg1_enable_bo(&mut self, val: bool)
pub const fn set_reg1_enable_bo(&mut self, val: bool)
Enables the brownout detection.
Sourcepub const fn audio_div_lsb(&self) -> Misc2ClrAudioDivLsb
pub const fn audio_div_lsb(&self) -> Misc2ClrAudioDivLsb
LSB of Post-divider for Audio PLL
Sourcepub const fn set_audio_div_lsb(&mut self, val: Misc2ClrAudioDivLsb)
pub const fn set_audio_div_lsb(&mut self, val: Misc2ClrAudioDivLsb)
LSB of Post-divider for Audio PLL
Sourcepub const fn reg2_bo_offset(&self) -> Misc2ClrReg2BoOffset
pub const fn reg2_bo_offset(&self) -> Misc2ClrReg2BoOffset
This field defines the brown out voltage offset for the xPU power domain
Sourcepub const fn set_reg2_bo_offset(&mut self, val: Misc2ClrReg2BoOffset)
pub const fn set_reg2_bo_offset(&mut self, val: Misc2ClrReg2BoOffset)
This field defines the brown out voltage offset for the xPU power domain
Sourcepub const fn reg2_bo_status(&self) -> bool
pub const fn reg2_bo_status(&self) -> bool
Reg2 brownout status bit.
Sourcepub const fn set_reg2_bo_status(&mut self, val: bool)
pub const fn set_reg2_bo_status(&mut self, val: bool)
Reg2 brownout status bit.
Sourcepub const fn reg2_enable_bo(&self) -> bool
pub const fn reg2_enable_bo(&self) -> bool
Enables the brownout detection.
Sourcepub const fn set_reg2_enable_bo(&mut self, val: bool)
pub const fn set_reg2_enable_bo(&mut self, val: bool)
Enables the brownout detection.
Sourcepub const fn reg2_ok(&self) -> bool
pub const fn reg2_ok(&self) -> bool
Signals that the voltage is above the brownout level for the SOC supply
Sourcepub const fn set_reg2_ok(&mut self, val: bool)
pub const fn set_reg2_ok(&mut self, val: bool)
Signals that the voltage is above the brownout level for the SOC supply
Sourcepub const fn audio_div_msb(&self) -> Misc2ClrAudioDivMsb
pub const fn audio_div_msb(&self) -> Misc2ClrAudioDivMsb
MSB of Post-divider for Audio PLL
Sourcepub const fn set_audio_div_msb(&mut self, val: Misc2ClrAudioDivMsb)
pub const fn set_audio_div_msb(&mut self, val: Misc2ClrAudioDivMsb)
MSB of Post-divider for Audio PLL
Sourcepub const fn reg0_step_time(&self) -> Misc2ClrReg0StepTime
pub const fn reg0_step_time(&self) -> Misc2ClrReg0StepTime
Number of clock periods (24MHz clock).
Sourcepub const fn set_reg0_step_time(&mut self, val: Misc2ClrReg0StepTime)
pub const fn set_reg0_step_time(&mut self, val: Misc2ClrReg0StepTime)
Number of clock periods (24MHz clock).
Sourcepub const fn reg1_step_time(&self) -> Misc2ClrReg1StepTime
pub const fn reg1_step_time(&self) -> Misc2ClrReg1StepTime
Number of clock periods (24MHz clock).
Sourcepub const fn set_reg1_step_time(&mut self, val: Misc2ClrReg1StepTime)
pub const fn set_reg1_step_time(&mut self, val: Misc2ClrReg1StepTime)
Number of clock periods (24MHz clock).
Sourcepub const fn reg2_step_time(&self) -> Misc2ClrReg2StepTime
pub const fn reg2_step_time(&self) -> Misc2ClrReg2StepTime
Number of clock periods (24MHz clock).
Sourcepub const fn set_reg2_step_time(&mut self, val: Misc2ClrReg2StepTime)
pub const fn set_reg2_step_time(&mut self, val: Misc2ClrReg2StepTime)
Number of clock periods (24MHz clock).
Sourcepub const fn video_div(&self) -> Misc2ClrVideoDiv
pub const fn video_div(&self) -> Misc2ClrVideoDiv
Post-divider for video
Sourcepub const fn set_video_div(&mut self, val: Misc2ClrVideoDiv)
pub const fn set_video_div(&mut self, val: Misc2ClrVideoDiv)
Post-divider for video