#[repr(transparent)]pub struct Ctrl(pub u32);Expand description
ADC_ETC Global Control Register
Tuple Fields§
§0: u32Implementations§
Source§impl Ctrl
impl Ctrl
Sourcepub const fn trig_enable(&self) -> TrigEnable
pub const fn trig_enable(&self) -> TrigEnable
TRIG enable register.
Sourcepub const fn set_trig_enable(&mut self, val: TrigEnable)
pub const fn set_trig_enable(&mut self, val: TrigEnable)
TRIG enable register.
Sourcepub const fn ext0_trig_enable(&self) -> Ext0TrigEnable
pub const fn ext0_trig_enable(&self) -> Ext0TrigEnable
TSC0 TRIG enable register.
Sourcepub const fn set_ext0_trig_enable(&mut self, val: Ext0TrigEnable)
pub const fn set_ext0_trig_enable(&mut self, val: Ext0TrigEnable)
TSC0 TRIG enable register.
Sourcepub const fn ext0_trig_priority(&self) -> u8
pub const fn ext0_trig_priority(&self) -> u8
External TSC0 trigger priority, 7 is highest priority, while 0 is lowest.
Sourcepub const fn set_ext0_trig_priority(&mut self, val: u8)
pub const fn set_ext0_trig_priority(&mut self, val: u8)
External TSC0 trigger priority, 7 is highest priority, while 0 is lowest.
Sourcepub const fn ext1_trig_enable(&self) -> Ext1TrigEnable
pub const fn ext1_trig_enable(&self) -> Ext1TrigEnable
TSC1 TRIG enable register.
Sourcepub const fn set_ext1_trig_enable(&mut self, val: Ext1TrigEnable)
pub const fn set_ext1_trig_enable(&mut self, val: Ext1TrigEnable)
TSC1 TRIG enable register.
Sourcepub const fn ext1_trig_priority(&self) -> u8
pub const fn ext1_trig_priority(&self) -> u8
External TSC1 trigger priority, 7 is highest priority, while 0 is lowest.
Sourcepub const fn set_ext1_trig_priority(&mut self, val: u8)
pub const fn set_ext1_trig_priority(&mut self, val: u8)
External TSC1 trigger priority, 7 is highest priority, while 0 is lowest.
Sourcepub const fn pre_divider(&self) -> u8
pub const fn pre_divider(&self) -> u8
Pre-divider for trig delay and interval
Sourcepub const fn set_pre_divider(&mut self, val: u8)
pub const fn set_pre_divider(&mut self, val: u8)
Pre-divider for trig delay and interval
Sourcepub const fn dma_mode_sel(&self) -> DmaModeSel
pub const fn dma_mode_sel(&self) -> DmaModeSel
Select the trigger type of the DMA_REQ.
Sourcepub const fn set_dma_mode_sel(&mut self, val: DmaModeSel)
pub const fn set_dma_mode_sel(&mut self, val: DmaModeSel)
Select the trigger type of the DMA_REQ.
Sourcepub const fn tsc_bypass(&self) -> TscBypass
pub const fn tsc_bypass(&self) -> TscBypass
TSC Bypass To use ADC2, this bit should be cleared.
Sourcepub const fn set_tsc_bypass(&mut self, val: TscBypass)
pub const fn set_tsc_bypass(&mut self, val: TscBypass)
TSC Bypass To use ADC2, this bit should be cleared.
Sourcepub const fn set_softrst(&mut self, val: Softrst)
pub const fn set_softrst(&mut self, val: Softrst)
Software synchronous reset, active high.