#[repr(transparent)]pub struct Ctrl2(pub u32);Expand description
Control 2 Register
Tuple Fields§
§0: u32Implementations§
Source§impl Ctrl2
impl Ctrl2
Sourcepub const fn eacen(&self) -> Eacen
pub const fn eacen(&self) -> Eacen
This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process
Sourcepub const fn set_eacen(&mut self, val: Eacen)
pub const fn set_eacen(&mut self, val: Eacen)
This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process
Sourcepub const fn rrs(&self) -> Rrs
pub const fn rrs(&self) -> Rrs
If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame
Sourcepub const fn set_rrs(&mut self, val: Rrs)
pub const fn set_rrs(&mut self, val: Rrs)
If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame
Sourcepub const fn mrp(&self) -> Mrp
pub const fn mrp(&self) -> Mrp
If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO
Sourcepub const fn set_mrp(&mut self, val: Mrp)
pub const fn set_mrp(&mut self, val: Mrp)
If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO
Sourcepub const fn tasd(&self) -> u8
pub const fn tasd(&self) -> u8
This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus
Sourcepub const fn set_tasd(&mut self, val: u8)
pub const fn set_tasd(&mut self, val: u8)
This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus
Sourcepub const fn rffn(&self) -> u8
pub const fn rffn(&self) -> u8
This 4-bit field defines the number of Rx FIFO filters according to
Sourcepub const fn set_rffn(&mut self, val: u8)
pub const fn set_rffn(&mut self, val: u8)
This 4-bit field defines the number of Rx FIFO filters according to
Sourcepub const fn wrmfrz(&self) -> Wrmfrz
pub const fn wrmfrz(&self) -> Wrmfrz
Enable unrestricted write access to FlexCAN memory in Freeze mode
Sourcepub const fn set_wrmfrz(&mut self, val: Wrmfrz)
pub const fn set_wrmfrz(&mut self, val: Wrmfrz)
Enable unrestricted write access to FlexCAN memory in Freeze mode