#[repr(transparent)]pub struct Cisr(pub u32);Expand description
CCM Interrupt Status Register
Tuple Fields§
§0: u32Implementations§
Source§impl Cisr
impl Cisr
Sourcepub const fn lrf_pll(&self) -> LrfPll
pub const fn lrf_pll(&self) -> LrfPll
CCM interrupt request 2 generated due to lock of all enabled and not bypaseed PLLs
Sourcepub const fn set_lrf_pll(&mut self, val: LrfPll)
pub const fn set_lrf_pll(&mut self, val: LrfPll)
CCM interrupt request 2 generated due to lock of all enabled and not bypaseed PLLs
Sourcepub const fn cosc_ready(&self) -> CisrCoscReady
pub const fn cosc_ready(&self) -> CisrCoscReady
CCM interrupt request 2 generated due to on board oscillator ready, i
Sourcepub const fn set_cosc_ready(&mut self, val: CisrCoscReady)
pub const fn set_cosc_ready(&mut self, val: CisrCoscReady)
CCM interrupt request 2 generated due to on board oscillator ready, i
Sourcepub const fn semc_podf_loaded(&self) -> SemcPodfLoaded
pub const fn semc_podf_loaded(&self) -> SemcPodfLoaded
CCM interrupt request 1 generated due to frequency change of semc_podf
Sourcepub const fn set_semc_podf_loaded(&mut self, val: SemcPodfLoaded)
pub const fn set_semc_podf_loaded(&mut self, val: SemcPodfLoaded)
CCM interrupt request 1 generated due to frequency change of semc_podf
Sourcepub const fn periph2_clk_sel_loaded(&self) -> Periph2ClkSelLoaded
pub const fn periph2_clk_sel_loaded(&self) -> Periph2ClkSelLoaded
CCM interrupt request 1 generated due to frequency change of periph2_clk_sel
Sourcepub const fn set_periph2_clk_sel_loaded(&mut self, val: Periph2ClkSelLoaded)
pub const fn set_periph2_clk_sel_loaded(&mut self, val: Periph2ClkSelLoaded)
CCM interrupt request 1 generated due to frequency change of periph2_clk_sel
Sourcepub const fn ahb_podf_loaded(&self) -> AhbPodfLoaded
pub const fn ahb_podf_loaded(&self) -> AhbPodfLoaded
CCM interrupt request 1 generated due to frequency change of ahb_podf
Sourcepub const fn set_ahb_podf_loaded(&mut self, val: AhbPodfLoaded)
pub const fn set_ahb_podf_loaded(&mut self, val: AhbPodfLoaded)
CCM interrupt request 1 generated due to frequency change of ahb_podf
Sourcepub const fn periph_clk_sel_loaded(&self) -> PeriphClkSelLoaded
pub const fn periph_clk_sel_loaded(&self) -> PeriphClkSelLoaded
CCM interrupt request 1 generated due to update of periph_clk_sel.
Sourcepub const fn set_periph_clk_sel_loaded(&mut self, val: PeriphClkSelLoaded)
pub const fn set_periph_clk_sel_loaded(&mut self, val: PeriphClkSelLoaded)
CCM interrupt request 1 generated due to update of periph_clk_sel.
Sourcepub const fn arm_podf_loaded(&self) -> CisrArmPodfLoaded
pub const fn arm_podf_loaded(&self) -> CisrArmPodfLoaded
CCM interrupt request 1 generated due to frequency change of arm_podf
Sourcepub const fn set_arm_podf_loaded(&mut self, val: CisrArmPodfLoaded)
pub const fn set_arm_podf_loaded(&mut self, val: CisrArmPodfLoaded)
CCM interrupt request 1 generated due to frequency change of arm_podf