#[repr(transparent)]pub struct Inten(pub u32);Expand description
Interrupt Enable Register
Tuple Fields§
§0: u32Implementations§
Source§impl Inten
impl Inten
Sourcepub const fn ipcmddoneen(&self) -> bool
pub const fn ipcmddoneen(&self) -> bool
IP triggered Command Sequences Execution finished interrupt enable.
Sourcepub const fn set_ipcmddoneen(&mut self, val: bool)
pub const fn set_ipcmddoneen(&mut self, val: bool)
IP triggered Command Sequences Execution finished interrupt enable.
Sourcepub const fn ipcmdgeen(&self) -> bool
pub const fn ipcmdgeen(&self) -> bool
IP triggered Command Sequences Grant Timeout interrupt enable.
Sourcepub const fn set_ipcmdgeen(&mut self, val: bool)
pub const fn set_ipcmdgeen(&mut self, val: bool)
IP triggered Command Sequences Grant Timeout interrupt enable.
Sourcepub const fn ahbcmdgeen(&self) -> bool
pub const fn ahbcmdgeen(&self) -> bool
AHB triggered Command Sequences Grant Timeout interrupt enable.
Sourcepub const fn set_ahbcmdgeen(&mut self, val: bool)
pub const fn set_ahbcmdgeen(&mut self, val: bool)
AHB triggered Command Sequences Grant Timeout interrupt enable.
Sourcepub const fn ipcmderren(&self) -> bool
pub const fn ipcmderren(&self) -> bool
IP triggered Command Sequences Error Detected interrupt enable.
Sourcepub const fn set_ipcmderren(&mut self, val: bool)
pub const fn set_ipcmderren(&mut self, val: bool)
IP triggered Command Sequences Error Detected interrupt enable.
Sourcepub const fn ahbcmderren(&self) -> bool
pub const fn ahbcmderren(&self) -> bool
AHB triggered Command Sequences Error Detected interrupt enable.
Sourcepub const fn set_ahbcmderren(&mut self, val: bool)
pub const fn set_ahbcmderren(&mut self, val: bool)
AHB triggered Command Sequences Error Detected interrupt enable.
Sourcepub const fn set_iprxwaen(&mut self, val: bool)
pub const fn set_iprxwaen(&mut self, val: bool)
IP RX FIFO WaterMark available interrupt enable.
Sourcepub const fn set_iptxween(&mut self, val: bool)
pub const fn set_iptxween(&mut self, val: bool)
IP TX FIFO WaterMark empty interrupt enable.
Sourcepub const fn sckstopbyrden(&self) -> bool
pub const fn sckstopbyrden(&self) -> bool
SCLK is stopped during command sequence because Async RX FIFO full interrupt enable.
Sourcepub const fn set_sckstopbyrden(&mut self, val: bool)
pub const fn set_sckstopbyrden(&mut self, val: bool)
SCLK is stopped during command sequence because Async RX FIFO full interrupt enable.
Sourcepub const fn sckstopbywren(&self) -> bool
pub const fn sckstopbywren(&self) -> bool
SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable.
Sourcepub const fn set_sckstopbywren(&mut self, val: bool)
pub const fn set_sckstopbywren(&mut self, val: bool)
SCLK is stopped during command sequence because Async TX FIFO empty interrupt enable.
Sourcepub const fn ahbbustimeouten(&self) -> bool
pub const fn ahbbustimeouten(&self) -> bool
AHB Bus timeout interrupt.Refer Interrupts chapter for more details.
Sourcepub const fn set_ahbbustimeouten(&mut self, val: bool)
pub const fn set_ahbbustimeouten(&mut self, val: bool)
AHB Bus timeout interrupt.Refer Interrupts chapter for more details.
Sourcepub const fn seqtimeouten(&self) -> bool
pub const fn seqtimeouten(&self) -> bool
Sequence execution timeout interrupt enable.Refer Interrupts chapter for more details.
Sourcepub const fn set_seqtimeouten(&mut self, val: bool)
pub const fn set_seqtimeouten(&mut self, val: bool)
Sequence execution timeout interrupt enable.Refer Interrupts chapter for more details.