#[repr(transparent)]pub struct Misc0Set(pub u32);Expand description
Miscellaneous Register 0
Tuple Fields§
§0: u32Implementations§
Source§impl Misc0Set
impl Misc0Set
Sourcepub const fn reftop_pwd(&self) -> bool
pub const fn reftop_pwd(&self) -> bool
Control bit to power-down the analog bandgap reference circuitry
Sourcepub const fn set_reftop_pwd(&mut self, val: bool)
pub const fn set_reftop_pwd(&mut self, val: bool)
Control bit to power-down the analog bandgap reference circuitry
Sourcepub const fn reftop_selfbiasoff(&self) -> Misc0SetReftopSelfbiasoff
pub const fn reftop_selfbiasoff(&self) -> Misc0SetReftopSelfbiasoff
Control bit to disable the self-bias circuit in the analog bandgap
Sourcepub const fn set_reftop_selfbiasoff(&mut self, val: Misc0SetReftopSelfbiasoff)
pub const fn set_reftop_selfbiasoff(&mut self, val: Misc0SetReftopSelfbiasoff)
Control bit to disable the self-bias circuit in the analog bandgap
Sourcepub const fn reftop_vbgadj(&self) -> Misc0SetReftopVbgadj
pub const fn reftop_vbgadj(&self) -> Misc0SetReftopVbgadj
Not related to oscillator.
Sourcepub const fn set_reftop_vbgadj(&mut self, val: Misc0SetReftopVbgadj)
pub const fn set_reftop_vbgadj(&mut self, val: Misc0SetReftopVbgadj)
Not related to oscillator.
Sourcepub const fn reftop_vbgup(&self) -> bool
pub const fn reftop_vbgup(&self) -> bool
Status bit that signals the analog bandgap voltage is up and stable
Sourcepub const fn set_reftop_vbgup(&mut self, val: bool)
pub const fn set_reftop_vbgup(&mut self, val: bool)
Status bit that signals the analog bandgap voltage is up and stable
Sourcepub const fn stop_mode_config(&self) -> Misc0SetStopModeConfig
pub const fn stop_mode_config(&self) -> Misc0SetStopModeConfig
Configure the analog behavior in stop mode. Not related to oscillator.
Sourcepub const fn set_stop_mode_config(&mut self, val: Misc0SetStopModeConfig)
pub const fn set_stop_mode_config(&mut self, val: Misc0SetStopModeConfig)
Configure the analog behavior in stop mode. Not related to oscillator.
Sourcepub const fn discon_high_snvs(&self) -> Misc0SetDisconHighSnvs
pub const fn discon_high_snvs(&self) -> Misc0SetDisconHighSnvs
This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
Sourcepub const fn set_discon_high_snvs(&mut self, val: Misc0SetDisconHighSnvs)
pub const fn set_discon_high_snvs(&mut self, val: Misc0SetDisconHighSnvs)
This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
Sourcepub const fn osc_i(&self) -> Misc0SetOscI
pub const fn osc_i(&self) -> Misc0SetOscI
This field determines the bias current in the 24MHz oscillator
Sourcepub const fn set_osc_i(&mut self, val: Misc0SetOscI)
pub const fn set_osc_i(&mut self, val: Misc0SetOscI)
This field determines the bias current in the 24MHz oscillator
Sourcepub const fn osc_xtalok(&self) -> bool
pub const fn osc_xtalok(&self) -> bool
Status bit that signals that the output of the 24-MHz crystal oscillator is stable
Sourcepub const fn set_osc_xtalok(&mut self, val: bool)
pub const fn set_osc_xtalok(&mut self, val: bool)
Status bit that signals that the output of the 24-MHz crystal oscillator is stable
Sourcepub const fn osc_xtalok_en(&self) -> bool
pub const fn osc_xtalok_en(&self) -> bool
This bit enables the detector that signals when the 24MHz crystal oscillator is stable.
Sourcepub const fn set_osc_xtalok_en(&mut self, val: bool)
pub const fn set_osc_xtalok_en(&mut self, val: bool)
This bit enables the detector that signals when the 24MHz crystal oscillator is stable.
Sourcepub const fn clkgate_ctrl(&self) -> Misc0SetClkgateCtrl
pub const fn clkgate_ctrl(&self) -> Misc0SetClkgateCtrl
This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
Sourcepub const fn set_clkgate_ctrl(&mut self, val: Misc0SetClkgateCtrl)
pub const fn set_clkgate_ctrl(&mut self, val: Misc0SetClkgateCtrl)
This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
Sourcepub const fn clkgate_delay(&self) -> Misc0SetClkgateDelay
pub const fn clkgate_delay(&self) -> Misc0SetClkgateDelay
This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
Sourcepub const fn set_clkgate_delay(&mut self, val: Misc0SetClkgateDelay)
pub const fn set_clkgate_delay(&mut self, val: Misc0SetClkgateDelay)
This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
Sourcepub const fn rtc_xtal_source(&self) -> Misc0SetRtcXtalSource
pub const fn rtc_xtal_source(&self) -> Misc0SetRtcXtalSource
This field indicates which chip source is being used for the rtc clock.
Sourcepub const fn set_rtc_xtal_source(&mut self, val: Misc0SetRtcXtalSource)
pub const fn set_rtc_xtal_source(&mut self, val: Misc0SetRtcXtalSource)
This field indicates which chip source is being used for the rtc clock.
Sourcepub const fn xtal_24m_pwd(&self) -> bool
pub const fn xtal_24m_pwd(&self) -> bool
This field powers down the 24M crystal oscillator if set true.
Sourcepub const fn set_xtal_24m_pwd(&mut self, val: bool)
pub const fn set_xtal_24m_pwd(&mut self, val: bool)
This field powers down the 24M crystal oscillator if set true.
Sourcepub const fn vid_pll_prediv(&self) -> Misc0SetVidPllPrediv
pub const fn vid_pll_prediv(&self) -> Misc0SetVidPllPrediv
Predivider for the source clock of the PLL’s. Not related to oscillator.
Sourcepub const fn set_vid_pll_prediv(&mut self, val: Misc0SetVidPllPrediv)
pub const fn set_vid_pll_prediv(&mut self, val: Misc0SetVidPllPrediv)
Predivider for the source clock of the PLL’s. Not related to oscillator.