Module regs 

Structs

Areg

A register.

Breg

B register.

Creg

C register.

Ctrl0

Contains the offsets of AB and CD in the RAM.

Ctrl1

Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR.

Dreg

D register.

Intenclr

Clears interrupts.

Intenset

Sets interrupts.

Intstat

Interrupt status bits (mask of INTENSET and STATUS).

Lock

Security lock register.

Mask

Optional mask register.

Remask

Optional re-mask register.

Res0

Result register 0.

Res1

Result register 1.

Res2

Result register 2.

Res3

Result register 3.

Status

Indicates operational status and would contain the carry bit if used.