Module regs 

Structs

Mconfig

Master Configuration Register

Mctrl

Master Main Control Register

Mdatactrl

Master Data Control Register

Mdmactrl

Master DMA Control Register

Mdynaddr

Master Dynamic Address Register

Merrwarn

Master Errors and Warnings Register

Mibirules

Master In-band Interrupt Registry and Rules Register

Mintclr

Master Interrupt Clear Register

Mintmasked

Master Interrupt Mask Register

Mintset

Master Interrupt Set Register

Mrdatab

Master Read Data Byte Register

Mrdatah

Master Read Data Half-word Register

MrmsgDdr

Master Read Message in DDR mode

MrmsgSdr

Master Read Message in SDR mode

Mstatus

Master Status Register

Mwdatab

Master Write Data Byte Register

Mwdatabe

Master Write Data Byte End Register

Mwdatah

Master Write Data Half-word Register

Mwdatahe

Master Write Data Byte End Register

MwmsgDdrControl

Master Write Message in DDR mode

MwmsgDdrData

Master Write Message Data in DDR mode

MwmsgSdrControl

Master Write Message in SDR mode

MwmsgSdrData

Master Write Message Data in SDR mode

Scapabilities

Slave Capabilities Register

Sconfig

Slave Configuration Register

Sctrl

Slave Control Register

Sdatactrl

Slave Data Control Register

Sdmactrl

Slave DMA Control Register

Sdynaddr

Slave Dynamic Address Register

Serrwarn

Slave Errors and Warnings Register

Sid

Slave Module ID Register

Sidext

Slave ID Extension Register

Sidpartno

Slave ID Part Number Register

Sintclr

Slave Interrupt Clear Register

Sintmasked

Slave Interrupt Mask Register

Sintset

Slave Interrupt Set Register

Smaxlimits

Slave Maximum Limits Register

Smsgmapaddr

Slave Message-Mapped Address Register

Srdatab

Slave Read Data Byte Register

Srdatah

Slave Read Data Half-word Register

Sstatus

Slave Status Register

Stcclock

Slave Time Control Clock Register

Svendorid

Slave Vendor ID Register

Swdatab

Slave Write Data Byte Register

Swdatabe

Slave Write Data Byte End

Swdatah

Slave Write Data Half-word Register

Swdatahe

Slave Write Data Half-word End Register