#[repr(transparent)]pub struct OtpClkDiv(pub u32);Expand description
OTP clock divider register
Tuple Fields§
§0: u32Implementations§
Source§impl OtpClkDiv
impl OtpClkDiv
Sourcepub const fn div(&self) -> Div
pub const fn div(&self) -> Div
Clock divider value by -1 encoding. It’s used to generate the clock to OTP memory (otp_clk) with apb_clk. The maximum otp_clk frequency is 120Mhz. 0: Divide by 1
Sourcepub const fn set_div(&mut self, val: Div)
pub const fn set_div(&mut self, val: Div)
Clock divider value by -1 encoding. It’s used to generate the clock to OTP memory (otp_clk) with apb_clk. The maximum otp_clk frequency is 120Mhz. 0: Divide by 1
Sourcepub const fn reset(&self) -> bool
pub const fn reset(&self) -> bool
Resets the divider counter. Can be used to make sure a new divider value is used right away rather than completing the previous count.
Sourcepub const fn set_reset(&mut self, val: bool)
pub const fn set_reset(&mut self, val: bool)
Resets the divider counter. Can be used to make sure a new divider value is used right away rather than completing the previous count.
Sourcepub const fn halt(&self) -> bool
pub const fn halt(&self) -> bool
Halts the divider counter. The intent is to allow the divider’s clock source to be changed without the risk of a glitch at the output.
Sourcepub const fn set_halt(&mut self, val: bool)
pub const fn set_halt(&mut self, val: bool)
Halts the divider counter. The intent is to allow the divider’s clock source to be changed without the risk of a glitch at the output.
Sourcepub const fn reqflag(&self) -> bool
pub const fn reqflag(&self) -> bool
Divider status flag. Set when a change is made to the divider value, cleared when the change is complete.
Sourcepub const fn set_reqflag(&mut self, val: bool)
pub const fn set_reqflag(&mut self, val: bool)
Divider status flag. Set when a change is made to the divider value, cleared when the change is complete.