Struct Debug0Clr 

#[repr(transparent)]
pub struct Debug0Clr(pub u32);

USB PHY Debug Register 0

Tuple Fields

0: u32

Implementations

impl Debug0Clr

pub const fn debug_interface_hold(&self) -> bool

Use holding registers to assist in timing for external UTMI interface.

pub const fn set_debug_interface_hold(&mut self, val: bool)

Use holding registers to assist in timing for external UTMI interface.

pub const fn hstpulldown(&self) -> u8

This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through DEBUG[5:4} Set bit 3 to value 1’b1 to connect the 15ohm pulldown on USB_DP line

pub const fn set_hstpulldown(&mut self, val: u8)

This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through DEBUG[5:4} Set bit 3 to value 1’b1 to connect the 15ohm pulldown on USB_DP line

pub const fn enhstpulldown(&self) -> u8

This bit field selects host pulldown overdrive mode

pub const fn set_enhstpulldown(&mut self, val: u8)

This bit field selects host pulldown overdrive mode

pub const fn tx2rxcount(&self) -> u8

Delay in between the end of transmit to the beginning of receive

pub const fn set_tx2rxcount(&mut self, val: u8)

Delay in between the end of transmit to the beginning of receive

pub const fn entx2rxcount(&self) -> bool

Set this bit to allow a countdown to transition in between TX and RX.

pub const fn set_entx2rxcount(&mut self, val: bool)

Set this bit to allow a countdown to transition in between TX and RX.

pub const fn squelchresetcount(&self) -> u8

Delay in between the detection of squelch to the reset of high-speed RX.

pub const fn set_squelchresetcount(&mut self, val: u8)

Delay in between the detection of squelch to the reset of high-speed RX.

pub const fn ensquelchreset(&self) -> bool

Set bit to allow squelch to reset high-speed receive.

pub const fn set_ensquelchreset(&mut self, val: bool)

Set bit to allow squelch to reset high-speed receive.

pub const fn squelchresetlength(&self) -> u8

Duration of RESET in terms of the number of 480-MHz cycles.

pub const fn set_squelchresetlength(&mut self, val: u8)

Duration of RESET in terms of the number of 480-MHz cycles.

pub const fn host_resume_debug(&self) -> bool

Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.

pub const fn set_host_resume_debug(&mut self, val: bool)

Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.

pub const fn clkgate(&self) -> bool

Gate Test Clocks

pub const fn set_clkgate(&mut self, val: bool)

Gate Test Clocks

Trait Implementations

impl Clone for Debug0Clr

fn clone(&self) -> Debug0Clr

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Debug0Clr

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Debug0Clr

fn default() -> Debug0Clr

Returns the “default value” for a type.

impl PartialEq for Debug0Clr

fn eq(&self, other: &Debug0Clr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Debug0Clr

impl Eq for Debug0Clr

impl StructuralPartialEq for Debug0Clr