Struct rp_pac::pio::regs::SmPinctrl

#[repr(transparent)]
pub struct SmPinctrl(pub u32);

State machine pin control

Tuple Fields

0: u32

Implementations

impl SmPinctrl

pub const fn out_base(&self) -> u8

The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.

pub fn set_out_base(&mut self, val: u8)

The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.

pub const fn set_base(&self) -> u8

The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.

pub fn set_set_base(&mut self, val: u8)

The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.

pub const fn sideset_base(&self) -> u8

The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction’s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.

pub fn set_sideset_base(&mut self, val: u8)

The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction’s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.

pub const fn in_base(&self) -> u8

The pin which is mapped to the least-significant bit of a state machine’s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.

pub fn set_in_base(&mut self, val: u8)

The pin which is mapped to the least-significant bit of a state machine’s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.

pub const fn out_count(&self) -> u8

The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.

pub fn set_out_count(&mut self, val: u8)

The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.

pub const fn set_count(&self) -> u8

The number of pins asserted by a SET. In the range 0 to 5 inclusive.

pub fn set_set_count(&mut self, val: u8)

The number of pins asserted by a SET. In the range 0 to 5 inclusive.

pub const fn sideset_count(&self) -> u8

The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).

pub fn set_sideset_count(&mut self, val: u8)

The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).

Trait Implementations

impl Clone for SmPinctrl

fn clone(&self) -> SmPinctrl

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for SmPinctrl

fn default() -> SmPinctrl

Returns the “default value” for a type.

impl PartialEq for SmPinctrl

fn eq(&self, other: &SmPinctrl) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for SmPinctrl

impl Eq for SmPinctrl

impl StructuralPartialEq for SmPinctrl