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lpc55s69_cm33_core0

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Module regs

Module regs 

Source

Structsยง

Cpu0LockReg
Miscalleneous control signals for in Cortex M33 (CPU0)
Cpu1LockReg
Miscalleneous control signals for in micro-Cortex M33 (CPU1)
MasterSecAntiPolReg
master secure level anti-pole register
MasterSecLevel
master secure level register
MiscCtrlDpReg
secure control duplicate register
MiscCtrlReg
secure control register
SecCpuIntMask0
Secure Interrupt mask for CPU1
SecCpuIntMask1
Secure Interrupt mask for CPU1
SecCtrlAhbPort8Slave0Rule
Security access rules for AHB peripherals.
SecCtrlAhbPort8Slave1Rule
Security access rules for AHB peripherals.
SecCtrlAhbPort9Slave0Rule
Security access rules for AHB peripherals.
SecCtrlAhbPort9Slave1Rule
Security access rules for AHB peripherals.
SecCtrlAhbPort10Slave0Rule
Security access rules for AHB peripherals.
SecCtrlAhbPort10Slave1Rule
Security access rules for AHB peripherals.
SecCtrlAhbSecCtrlMemRule
Security access rules for AHB_SEC_CTRL_AHB.
SecCtrlApbBridge0MemCtrl0
Security access rules for APB Bridge 0 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 0 sectors in total.
SecCtrlApbBridge0MemCtrl1
Security access rules for APB Bridge 0 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 0 sectors in total.
SecCtrlApbBridge0MemCtrl2
Security access rules for APB Bridge 0 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 0 sectors in total.
SecCtrlApbBridge1MemCtrl0
Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 1 sectors in total.
SecCtrlApbBridge1MemCtrl1
Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 1 sectors in total.
SecCtrlApbBridge1MemCtrl2
Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 1 sectors in total.
SecCtrlApbBridge1MemCtrl3
Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 1 sectors in total.
SecCtrlApbBridgeSlaveRule
Security access rules for both APB Bridges slaves.
SecCtrlFlashMemRule0
Security access rules for FLASH sector 0 to sector 20. Each Flash sector is 32 Kbytes. There are 20 FLASH sectors in total.
SecCtrlFlashMemRule1
Security access rules for FLASH sector 0 to sector 20. Each Flash sector is 32 Kbytes. There are 20 FLASH sectors in total.
SecCtrlFlashMemRule2
Security access rules for FLASH sector 0 to sector 20. Each Flash sector is 32 Kbytes. There are 20 FLASH sectors in total.
SecCtrlFlashRomSlaveRule
Security access rules for Flash and ROM slaves.
SecCtrlRam0MemRule0
Security access rules for RAM0 slaves.
SecCtrlRam0MemRule1
Security access rules for RAM0 slaves.
SecCtrlRam0SlaveRule
Security access rules for RAM0 slaves.
SecCtrlRam1MemRule0
Security access rules for RAM1 slaves.
SecCtrlRam1MemRule1
Security access rules for RAM1 slaves.
SecCtrlRam1SlaveRule
Security access rules for RAM1 slaves.
SecCtrlRam2MemRule0
Security access rules for RAM2 slaves.
SecCtrlRam2MemRule1
Security access rules for RAM2 slaves.
SecCtrlRam2SlaveRule
Security access rules for RAM2 slaves.
SecCtrlRam3MemRule0
Security access rules for RAM3 slaves.
SecCtrlRam3MemRule1
Security access rules for RAM3 slaves.
SecCtrlRam3SlaveRule
Security access rules for RAM3 slaves.
SecCtrlRam4MemRule0
Security access rules for RAM4 slaves.
SecCtrlRam4SlaveRule
Security access rules for RAM4 slaves.
SecCtrlRamxMemRule0
Security access rules for RAMX slaves.
SecCtrlRamxSlaveRule
Security access rules for RAMX slaves.
SecCtrlRomMemRule0
Security access rules for ROM sector 0 to sector 31. Each ROM sector is 4 Kbytes. There are 32 ROM sectors in total.
SecCtrlRomMemRule1
Security access rules for ROM sector 0 to sector 31. Each ROM sector is 4 Kbytes. There are 32 ROM sectors in total.
SecCtrlRomMemRule2
Security access rules for ROM sector 0 to sector 31. Each ROM sector is 4 Kbytes. There are 32 ROM sectors in total.
SecCtrlRomMemRule3
Security access rules for ROM sector 0 to sector 31. Each ROM sector is 4 Kbytes. There are 32 ROM sectors in total.
SecCtrlUsbHsMemRule
Security access rules for RAM_USB_HS.
SecCtrlUsbHsSlaveRule
Security access rules for USB High speed RAM slaves.
SecGpioMask0
Secure GPIO mask for port 0 pins.
SecGpioMask1
Secure GPIO mask for port 1 pins.
SecMaskLock
Security General Purpose register access control.
SecVioAddr
most recent security violation address for AHB port n
SecVioInfoValid
security violation address/information registers valid flags
SecVioMiscInfo
most recent security violation miscellaneous information for AHB port n