Struct SecCpuIntMask1 

#[repr(transparent)]
pub struct SecCpuIntMask1(pub u32);

Secure Interrupt mask for CPU1

Tuple Fields

0: u32

Implementations

impl SecCpuIntMask1

pub const fn gpio_int0_irq4(&self) -> bool

Pin interrupt 4 or pattern match engine slice 4 interrupt.

pub const fn set_gpio_int0_irq4(&mut self, val: bool)

Pin interrupt 4 or pattern match engine slice 4 interrupt.

pub const fn gpio_int0_irq5(&self) -> bool

Pin interrupt 5 or pattern match engine slice 5 interrupt.

pub const fn set_gpio_int0_irq5(&mut self, val: bool)

Pin interrupt 5 or pattern match engine slice 5 interrupt.

pub const fn gpio_int0_irq6(&self) -> bool

Pin interrupt 6 or pattern match engine slice 6 interrupt.

pub const fn set_gpio_int0_irq6(&mut self, val: bool)

Pin interrupt 6 or pattern match engine slice 6 interrupt.

pub const fn gpio_int0_irq7(&self) -> bool

Pin interrupt 7 or pattern match engine slice 7 interrupt.

pub const fn set_gpio_int0_irq7(&mut self, val: bool)

Pin interrupt 7 or pattern match engine slice 7 interrupt.

pub const fn ctimer2_irq(&self) -> bool

Standard counter/timer 2 interrupt.

pub const fn set_ctimer2_irq(&mut self, val: bool)

Standard counter/timer 2 interrupt.

pub const fn ctimer4_irq(&self) -> bool

Standard counter/timer 4 interrupt.

pub const fn set_ctimer4_irq(&mut self, val: bool)

Standard counter/timer 4 interrupt.

pub const fn os_event_timer_irq(&self) -> bool

OS Event Timer and OS Event Timer Wakeup interrupts

pub const fn set_os_event_timer_irq(&mut self, val: bool)

OS Event Timer and OS Event Timer Wakeup interrupts

pub const fn reserved0(&self) -> bool

Reserved. Read value is undefined, only zero should be written.

pub const fn set_reserved0(&mut self, val: bool)

Reserved. Read value is undefined, only zero should be written.

pub const fn reserved1(&self) -> bool

Reserved. Read value is undefined, only zero should be written.

pub const fn set_reserved1(&mut self, val: bool)

Reserved. Read value is undefined, only zero should be written.

pub const fn reserved2(&self) -> bool

Reserved. Read value is undefined, only zero should be written.

pub const fn set_reserved2(&mut self, val: bool)

Reserved. Read value is undefined, only zero should be written.

pub const fn sdio_irq(&self) -> bool

SDIO Controller interrupt.

pub const fn set_sdio_irq(&mut self, val: bool)

SDIO Controller interrupt.

pub const fn reserved3(&self) -> bool

Reserved. Read value is undefined, only zero should be written.

pub const fn set_reserved3(&mut self, val: bool)

Reserved. Read value is undefined, only zero should be written.

pub const fn reserved4(&self) -> bool

Reserved. Read value is undefined, only zero should be written.

pub const fn set_reserved4(&mut self, val: bool)

Reserved. Read value is undefined, only zero should be written.

pub const fn reserved5(&self) -> bool

Reserved. Read value is undefined, only zero should be written.

pub const fn set_reserved5(&mut self, val: bool)

Reserved. Read value is undefined, only zero should be written.

pub const fn usb1_phy_irq(&self) -> bool

USB High Speed PHY Controller interrupt.

pub const fn set_usb1_phy_irq(&mut self, val: bool)

USB High Speed PHY Controller interrupt.

pub const fn usb1_irq(&self) -> bool

USB High Speed Controller interrupt.

pub const fn set_usb1_irq(&mut self, val: bool)

USB High Speed Controller interrupt.

pub const fn usb1_needclk(&self) -> bool

USB High Speed Controller Clock request interrupt.

pub const fn set_usb1_needclk(&mut self, val: bool)

USB High Speed Controller Clock request interrupt.

pub const fn sec_hypervisor_call_irq(&self) -> bool

Secure fault Hyper Visor call interrupt.

pub const fn set_sec_hypervisor_call_irq(&mut self, val: bool)

Secure fault Hyper Visor call interrupt.

pub const fn sec_gpio_int0_irq0(&self) -> bool

Secure Pin interrupt 0 or pattern match engine slice 0 interrupt.

pub const fn set_sec_gpio_int0_irq0(&mut self, val: bool)

Secure Pin interrupt 0 or pattern match engine slice 0 interrupt.

pub const fn sec_gpio_int0_irq1(&self) -> bool

Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.

pub const fn set_sec_gpio_int0_irq1(&mut self, val: bool)

Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.

pub const fn plu_irq(&self) -> bool

Programmable Look-Up Controller interrupt.

pub const fn set_plu_irq(&mut self, val: bool)

Programmable Look-Up Controller interrupt.

pub const fn sec_vio_irq(&self) -> bool

Security Violation interrupt.

pub const fn set_sec_vio_irq(&mut self, val: bool)

Security Violation interrupt.

pub const fn sha_irq(&self) -> bool

HASH-AES interrupt.

pub const fn set_sha_irq(&mut self, val: bool)

HASH-AES interrupt.

pub const fn casper_irq(&self) -> bool

CASPER interrupt.

pub const fn set_casper_irq(&mut self, val: bool)

CASPER interrupt.

pub const fn pufkey_irq(&self) -> bool

PUF interrupt.

pub const fn set_pufkey_irq(&mut self, val: bool)

PUF interrupt.

pub const fn pq_irq(&self) -> bool

Power Quad interrupt.

pub const fn set_pq_irq(&mut self, val: bool)

Power Quad interrupt.

pub const fn sdma1_irq(&self) -> bool

System DMA 1 (Secure) interrupt

pub const fn set_sdma1_irq(&mut self, val: bool)

System DMA 1 (Secure) interrupt

pub const fn lspi_hs_irq(&self) -> bool

High Speed SPI interrupt

pub const fn set_lspi_hs_irq(&mut self, val: bool)

High Speed SPI interrupt

Trait Implementations

impl Clone for SecCpuIntMask1

fn clone(&self) -> SecCpuIntMask1

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for SecCpuIntMask1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for SecCpuIntMask1

fn default() -> SecCpuIntMask1

Returns the “default value” for a type.

impl PartialEq for SecCpuIntMask1

fn eq(&self, other: &SecCpuIntMask1) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for SecCpuIntMask1

impl Eq for SecCpuIntMask1

impl StructuralPartialEq for SecCpuIntMask1