Struct DcfgCcSocuPin 

#[repr(transparent)]
pub struct DcfgCcSocuPin(pub u32);

With TZ-M, the part can be sold by level 1 customers (secure code developer) to level-2 customers who develops non-secure code only. - In this scenario, or easy of development, Level-I customer releases the part to always allow non-secure debug. - To allow level-2 customers to further seal the part DCFG_CC_SOCU_NS is used. - ROM will use this word to further restrict the debug access.

Tuple Fields

0: u32

Implementations

impl DcfgCcSocuPin

pub const fn niden(&self) -> DcfgCcSocuPinNiden

Non Secure non-invasive debug enable

pub const fn set_niden(&mut self, val: DcfgCcSocuPinNiden)

Non Secure non-invasive debug enable

pub const fn dbgen(&self) -> DcfgCcSocuPinDbgen

Non Secure debug enable

pub const fn set_dbgen(&mut self, val: DcfgCcSocuPinDbgen)

Non Secure debug enable

pub const fn spniden(&self) -> DcfgCcSocuPinSpniden

Secure non-invasive debug enable

pub const fn set_spniden(&mut self, val: DcfgCcSocuPinSpniden)

Secure non-invasive debug enable

pub const fn spiden(&self) -> DcfgCcSocuPinSpiden

Secure invasive debug enable

pub const fn set_spiden(&mut self, val: DcfgCcSocuPinSpiden)

Secure invasive debug enable

pub const fn tapen(&self) -> DcfgCcSocuPinTapen

JTAG TAP enable

pub const fn set_tapen(&mut self, val: DcfgCcSocuPinTapen)

JTAG TAP enable

pub const fn cpu1_dbgen(&self) -> DcfgCcSocuPinCpu1Dbgen

CPU1 (Micro cortex M33) invasive debug enable

pub const fn set_cpu1_dbgen(&mut self, val: DcfgCcSocuPinCpu1Dbgen)

CPU1 (Micro cortex M33) invasive debug enable

pub const fn isp_cmd_en(&self) -> DcfgCcSocuPinIspCmdEn

ISP Boot Command enable

pub const fn set_isp_cmd_en(&mut self, val: DcfgCcSocuPinIspCmdEn)

ISP Boot Command enable

pub const fn fa_cmd_en(&self) -> DcfgCcSocuPinFaCmdEn

FA Command enable

pub const fn set_fa_cmd_en(&mut self, val: DcfgCcSocuPinFaCmdEn)

FA Command enable

pub const fn me_cmd_en(&self) -> DcfgCcSocuPinMeCmdEn

Flash Mass Erase Command enable

pub const fn set_me_cmd_en(&mut self, val: DcfgCcSocuPinMeCmdEn)

Flash Mass Erase Command enable

pub const fn cpu1_niden(&self) -> DcfgCcSocuPinCpu1Niden

CPU1 (Micro cortex M33) non-invasive debug enable

pub const fn set_cpu1_niden(&mut self, val: DcfgCcSocuPinCpu1Niden)

CPU1 (Micro cortex M33) non-invasive debug enable

pub const fn uuid_check(&self) -> bool

Enforce UUID match during Debug authentication.

pub const fn set_uuid_check(&mut self, val: bool)

Enforce UUID match during Debug authentication.

pub const fn inverse_value(&self) -> u16

inverse value of bits [15:0]

pub const fn set_inverse_value(&mut self, val: u16)

inverse value of bits [15:0]

Trait Implementations

impl Clone for DcfgCcSocuPin

fn clone(&self) -> DcfgCcSocuPin

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for DcfgCcSocuPin

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for DcfgCcSocuPin

fn default() -> DcfgCcSocuPin

Returns the “default value” for a type.

impl PartialEq for DcfgCcSocuPin

fn eq(&self, other: &DcfgCcSocuPin) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for DcfgCcSocuPin

impl Eq for DcfgCcSocuPin

impl StructuralPartialEq for DcfgCcSocuPin