Struct Pll1ctrl 

#[repr(transparent)]
pub struct Pll1ctrl(pub u32);

PLL1 550m control

Tuple Fields

0: u32

Implementations

impl Pll1ctrl

pub const fn selr(&self) -> u8

Bandwidth select R value.

pub const fn set_selr(&mut self, val: u8)

Bandwidth select R value.

pub const fn seli(&self) -> u8

Bandwidth select I value.

pub const fn set_seli(&mut self, val: u8)

Bandwidth select I value.

pub const fn selp(&self) -> u8

Bandwidth select P value.

pub const fn set_selp(&mut self, val: u8)

Bandwidth select P value.

pub const fn bypasspll(&self) -> Pll1ctrlBypasspll

Bypass PLL input clock is sent directly to the PLL output (default).

pub const fn set_bypasspll(&mut self, val: Pll1ctrlBypasspll)

Bypass PLL input clock is sent directly to the PLL output (default).

pub const fn bypasspostdiv2(&self) -> Pll1ctrlBypasspostdiv2

bypass of the divide-by-2 divider in the post-divider.

pub const fn set_bypasspostdiv2(&mut self, val: Pll1ctrlBypasspostdiv2)

bypass of the divide-by-2 divider in the post-divider.

pub const fn limupoff(&self) -> bool

limup_off = 1 in spread spectrum and fractional PLL applications.

pub const fn set_limupoff(&mut self, val: bool)

limup_off = 1 in spread spectrum and fractional PLL applications.

pub const fn bwdirect(&self) -> Pll1ctrlBwdirect

control of the bandwidth of the PLL.

pub const fn set_bwdirect(&mut self, val: Pll1ctrlBwdirect)

control of the bandwidth of the PLL.

pub const fn bypassprediv(&self) -> Pll1ctrlBypassprediv

bypass of the pre-divider.

pub const fn set_bypassprediv(&mut self, val: Pll1ctrlBypassprediv)

bypass of the pre-divider.

pub const fn bypasspostdiv(&self) -> Pll1ctrlBypasspostdiv

bypass of the post-divider.

pub const fn set_bypasspostdiv(&mut self, val: Pll1ctrlBypasspostdiv)

bypass of the post-divider.

pub const fn clken(&self) -> bool

enable the output clock.

pub const fn set_clken(&mut self, val: bool)

enable the output clock.

pub const fn frmen(&self) -> bool

1: free running mode.

pub const fn set_frmen(&mut self, val: bool)

1: free running mode.

pub const fn frmclkstable(&self) -> bool

free running mode clockstable: Warning: Only make frm_clockstable = 1 after the PLL output frequency is stable.

pub const fn set_frmclkstable(&mut self, val: bool)

free running mode clockstable: Warning: Only make frm_clockstable = 1 after the PLL output frequency is stable.

pub const fn skewen(&self) -> bool

Skew mode.

pub const fn set_skewen(&mut self, val: bool)

Skew mode.

Trait Implementations

impl Clone for Pll1ctrl

fn clone(&self) -> Pll1ctrl

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Pll1ctrl

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Pll1ctrl

fn default() -> Pll1ctrl

Returns the “default value” for a type.

impl PartialEq for Pll1ctrl

fn eq(&self, other: &Pll1ctrl) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Pll1ctrl

impl Eq for Pll1ctrl

impl StructuralPartialEq for Pll1ctrl