Struct Port1Pcr1 

#[repr(transparent)]
pub struct Port1Pcr1(pub u32);

Pin Control 1.

Tuple Fields

0: u32

Implementations

impl Port1Pcr1

pub const fn ps(&self) -> Port1Pcr1Ps

Pull Select.

pub const fn set_ps(&mut self, val: Port1Pcr1Ps)

Pull Select.

pub const fn pe(&self) -> Port1Pcr1Pe

Pull Enable.

pub const fn set_pe(&mut self, val: Port1Pcr1Pe)

Pull Enable.

pub const fn sre(&self) -> Port1Pcr1Sre

Slew Rate Enable.

pub const fn set_sre(&mut self, val: Port1Pcr1Sre)

Slew Rate Enable.

pub const fn pfe(&self) -> Port1Pcr1Pfe

Passive Filter Enable.

pub const fn set_pfe(&mut self, val: Port1Pcr1Pfe)

Passive Filter Enable.

pub const fn ode(&self) -> Port1Pcr1Ode

Open Drain Enable.

pub const fn set_ode(&mut self, val: Port1Pcr1Ode)

Open Drain Enable.

pub const fn dse(&self) -> Port1Pcr1Dse

Drive Strength Enable.

pub const fn set_dse(&mut self, val: Port1Pcr1Dse)

Drive Strength Enable.

pub const fn mux(&self) -> Port1Pcr1Mux

Pin Multiplex Control.

pub const fn set_mux(&mut self, val: Port1Pcr1Mux)

Pin Multiplex Control.

pub const fn ibe(&self) -> Port1Pcr1Ibe

Input Buffer Enable.

pub const fn set_ibe(&mut self, val: Port1Pcr1Ibe)

Input Buffer Enable.

pub const fn inv(&self) -> Port1Pcr1Inv

Invert Input.

pub const fn set_inv(&mut self, val: Port1Pcr1Inv)

Invert Input.

pub const fn lk(&self) -> Port1Pcr1Lk

Lock Register.

pub const fn set_lk(&mut self, val: Port1Pcr1Lk)

Lock Register.

Trait Implementations

impl Clone for Port1Pcr1

fn clone(&self) -> Port1Pcr1

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Port1Pcr1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Port1Pcr1

fn default() -> Port1Pcr1

Returns the “default value” for a type.

impl PartialEq for Port1Pcr1

fn eq(&self, other: &Port1Pcr1) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Port1Pcr1

impl Eq for Port1Pcr1

impl StructuralPartialEq for Port1Pcr1