Struct Flexpwm 

pub struct Flexpwm { /* private fields */ }

PWM.

Implementations

impl Flexpwm

pub const unsafe fn from_ptr(ptr: *mut ()) -> Self

pub const fn as_ptr(&self) -> *mut ()

pub const fn sm0cnt(self) -> Reg<Sm0cnt, R>

Counter Register.

pub const fn sm0init(self) -> Reg<Sm0init, RW>

Initial Count Register.

pub const fn sm0ctrl2(self) -> Reg<Sm0ctrl2, RW>

Control 2 Register.

pub const fn sm0ctrl(self) -> Reg<Sm0ctrl, RW>

Control Register.

pub const fn sm0val0(self) -> Reg<Sm0val0, RW>

Value Register 0.

pub const fn sm0val1(self) -> Reg<Sm0val1, RW>

Value Register 1.

pub const fn sm0val2(self) -> Reg<Sm0val2, RW>

Value Register 2.

pub const fn sm0val3(self) -> Reg<Sm0val3, RW>

Value Register 3.

pub const fn sm0val4(self) -> Reg<Sm0val4, RW>

Value Register 4.

pub const fn sm0val5(self) -> Reg<Sm0val5, RW>

Value Register 5.

pub const fn sm0octrl(self) -> Reg<Sm0octrl, RW>

Output Control Register.

pub const fn sm0sts(self) -> Reg<Sm0sts, RW>

Status Register.

pub const fn sm0inten(self) -> Reg<Sm0inten, RW>

Interrupt Enable Register.

pub const fn sm0dmaen(self) -> Reg<Sm0dmaen, RW>

DMA Enable Register.

pub const fn sm0tctrl(self) -> Reg<Sm0tctrl, RW>

Output Trigger Control Register.

pub const fn sm0dismap0(self) -> Reg<Sm0dismap0, RW>

Fault Disable Mapping Register 0.

pub const fn sm0dtcnt0(self) -> Reg<Sm0dtcnt0, RW>

Deadtime Count Register 0.

pub const fn sm0dtcnt1(self) -> Reg<Sm0dtcnt1, RW>

Deadtime Count Register 1.

pub const fn sm0captctrlx(self) -> Reg<Sm0captctrlx, RW>

Capture Control X Register.

pub const fn sm0captcompx(self) -> Reg<Sm0captcompx, RW>

Capture Compare X Register.

pub const fn sm0cval0(self) -> Reg<Sm0cval0, R>

Capture Value 0 Register.

pub const fn sm0cval0cyc(self) -> Reg<Sm0cval0cyc, R>

Capture Value 0 Cycle Register.

pub const fn sm0cval1(self) -> Reg<Sm0cval1, R>

Capture Value 1 Register.

pub const fn sm0cval1cyc(self) -> Reg<Sm0cval1cyc, R>

Capture Value 1 Cycle Register.

pub const fn sm0captfiltx(self) -> Reg<Sm0captfiltx, RW>

Capture PWM_X Input Filter Register.

pub const fn sm1cnt(self) -> Reg<Sm1cnt, R>

Counter Register.

pub const fn sm1init(self) -> Reg<Sm1init, RW>

Initial Count Register.

pub const fn sm1ctrl2(self) -> Reg<Sm1ctrl2, RW>

Control 2 Register.

pub const fn sm1ctrl(self) -> Reg<Sm1ctrl, RW>

Control Register.

pub const fn sm1val0(self) -> Reg<Sm1val0, RW>

Value Register 0.

pub const fn sm1val1(self) -> Reg<Sm1val1, RW>

Value Register 1.

pub const fn sm1val2(self) -> Reg<Sm1val2, RW>

Value Register 2.

pub const fn sm1val3(self) -> Reg<Sm1val3, RW>

Value Register 3.

pub const fn sm1val4(self) -> Reg<Sm1val4, RW>

Value Register 4.

pub const fn sm1val5(self) -> Reg<Sm1val5, RW>

Value Register 5.

pub const fn sm1octrl(self) -> Reg<Sm1octrl, RW>

Output Control Register.

pub const fn sm1sts(self) -> Reg<Sm1sts, RW>

Status Register.

pub const fn sm1inten(self) -> Reg<Sm1inten, RW>

Interrupt Enable Register.

pub const fn sm1dmaen(self) -> Reg<Sm1dmaen, RW>

DMA Enable Register.

pub const fn sm1tctrl(self) -> Reg<Sm1tctrl, RW>

Output Trigger Control Register.

pub const fn sm1dismap0(self) -> Reg<Sm1dismap0, RW>

Fault Disable Mapping Register 0.

pub const fn sm1dtcnt0(self) -> Reg<Sm1dtcnt0, RW>

Deadtime Count Register 0.

pub const fn sm1dtcnt1(self) -> Reg<Sm1dtcnt1, RW>

Deadtime Count Register 1.

pub const fn sm1captctrlx(self) -> Reg<Sm1captctrlx, RW>

Capture Control X Register.

pub const fn sm1captcompx(self) -> Reg<Sm1captcompx, RW>

Capture Compare X Register.

pub const fn sm1cval0(self) -> Reg<Sm1cval0, R>

Capture Value 0 Register.

pub const fn sm1cval0cyc(self) -> Reg<Sm1cval0cyc, R>

Capture Value 0 Cycle Register.

pub const fn sm1cval1(self) -> Reg<Sm1cval1, R>

Capture Value 1 Register.

pub const fn sm1cval1cyc(self) -> Reg<Sm1cval1cyc, R>

Capture Value 1 Cycle Register.

pub const fn sm1phasedly(self) -> Reg<Sm1phasedly, RW>

Phase Delay Register.

pub const fn sm1captfiltx(self) -> Reg<Sm1captfiltx, RW>

Capture PWM_X Input Filter Register.

pub const fn sm2cnt(self) -> Reg<Sm2cnt, R>

Counter Register.

pub const fn sm2init(self) -> Reg<Sm2init, RW>

Initial Count Register.

pub const fn sm2ctrl2(self) -> Reg<Sm2ctrl2, RW>

Control 2 Register.

pub const fn sm2ctrl(self) -> Reg<Sm2ctrl, RW>

Control Register.

pub const fn sm2val0(self) -> Reg<Sm2val0, RW>

Value Register 0.

pub const fn sm2val1(self) -> Reg<Sm2val1, RW>

Value Register 1.

pub const fn sm2val2(self) -> Reg<Sm2val2, RW>

Value Register 2.

pub const fn sm2val3(self) -> Reg<Sm2val3, RW>

Value Register 3.

pub const fn sm2val4(self) -> Reg<Sm2val4, RW>

Value Register 4.

pub const fn sm2val5(self) -> Reg<Sm2val5, RW>

Value Register 5.

pub const fn sm2octrl(self) -> Reg<Sm2octrl, RW>

Output Control Register.

pub const fn sm2sts(self) -> Reg<Sm2sts, RW>

Status Register.

pub const fn sm2inten(self) -> Reg<Sm2inten, RW>

Interrupt Enable Register.

pub const fn sm2dmaen(self) -> Reg<Sm2dmaen, RW>

DMA Enable Register.

pub const fn sm2tctrl(self) -> Reg<Sm2tctrl, RW>

Output Trigger Control Register.

pub const fn sm2dismap0(self) -> Reg<Sm2dismap0, RW>

Fault Disable Mapping Register 0.

pub const fn sm2dtcnt0(self) -> Reg<Sm2dtcnt0, RW>

Deadtime Count Register 0.

pub const fn sm2dtcnt1(self) -> Reg<Sm2dtcnt1, RW>

Deadtime Count Register 1.

pub const fn sm2captctrlx(self) -> Reg<Sm2captctrlx, RW>

Capture Control X Register.

pub const fn sm2captcompx(self) -> Reg<Sm2captcompx, RW>

Capture Compare X Register.

pub const fn sm2cval0(self) -> Reg<Sm2cval0, R>

Capture Value 0 Register.

pub const fn sm2cval0cyc(self) -> Reg<Sm2cval0cyc, R>

Capture Value 0 Cycle Register.

pub const fn sm2cval1(self) -> Reg<Sm2cval1, R>

Capture Value 1 Register.

pub const fn sm2cval1cyc(self) -> Reg<Sm2cval1cyc, R>

Capture Value 1 Cycle Register.

pub const fn sm2phasedly(self) -> Reg<Sm2phasedly, RW>

Phase Delay Register.

pub const fn sm2captfiltx(self) -> Reg<Sm2captfiltx, RW>

Capture PWM_X Input Filter Register.

pub const fn outen(self) -> Reg<Outen, RW>

Output Enable Register.

pub const fn mask(self) -> Reg<Mask, RW>

Mask Register.

pub const fn swcout(self) -> Reg<Swcout, RW>

Software Controlled Output Register.

pub const fn dtsrcsel(self) -> Reg<Dtsrcsel, RW>

PWM Source Select Register.

pub const fn mctrl(self) -> Reg<Mctrl, RW>

Master Control Register.

pub const fn mctrl2(self) -> Reg<Mctrl2, RW>

Master Control 2 Register.

pub const fn fctrl0(self) -> Reg<Fctrl0, RW>

Fault Control Register.

pub const fn fsts0(self) -> Reg<Fsts0, RW>

Fault Status Register.

pub const fn ffilt0(self) -> Reg<Ffilt0, RW>

Fault Filter Register.

pub const fn ftst0(self) -> Reg<Ftst0, RW>

Fault Test Register.

pub const fn fctrl20(self) -> Reg<Fctrl20, RW>

Fault Control 2 Register.

Trait Implementations

impl Clone for Flexpwm

fn clone(&self) -> Flexpwm

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for Flexpwm

fn eq(&self, other: &Flexpwm) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Flexpwm

impl Eq for Flexpwm

impl Send for Flexpwm

impl StructuralPartialEq for Flexpwm

impl Sync for Flexpwm