Struct MacInterruptStatus 

#[repr(transparent)]
pub struct MacInterruptStatus(pub u32);

F70RM Rev. 1 section 51.7.1.11; manual text line 149801.

Tuple Fields

0: u32

Implementations

impl MacInterruptStatus

pub const fn phyis(&self) -> bool

PHY Interrupt. This bit is set when rising edge is detected on the phy_intr_i input. This bit is cleared when this register is read (or this bit is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set). 0b - PHY Interrupt not detected 1b - PHY Interrupt detected

pub const fn set_phyis(&mut self, val: bool)

PHY Interrupt. This bit is set when rising edge is detected on the phy_intr_i input. This bit is cleared when this register is read (or this bit is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set). 0b - PHY Interrupt not detected 1b - PHY Interrupt detected

pub const fn pmtis(&self) -> bool

Read-only. PMT Interrupt Status. This bit is set when a Magic packet or Wake-on-LAN packet is received in the power-down mode (RWKPRCVD and MGKPRCVD bits in MAC_PMT_Control_Status register). This bit is cleared when corresponding interrupt source bit are cleared because of a Read operation to the MAC_PMT_Control_Status register (or corresponding interrupt source bit of MAC_PMT_Control_Status register is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set). This bit is valid only when you select the Enable Power Management option. 0b - PMT Interrupt status not active 1b - PMT Interrupt status active

pub const fn set_pmtis(&mut self, val: bool)

Read-only. PMT Interrupt Status. This bit is set when a Magic packet or Wake-on-LAN packet is received in the power-down mode (RWKPRCVD and MGKPRCVD bits in MAC_PMT_Control_Status register). This bit is cleared when corresponding interrupt source bit are cleared because of a Read operation to the MAC_PMT_Control_Status register (or corresponding interrupt source bit of MAC_PMT_Control_Status register is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set). This bit is valid only when you select the Enable Power Management option. 0b - PMT Interrupt status not active 1b - PMT Interrupt status active

pub const fn tsis(&self) -> bool

Read-only. Timestamp Interrupt Status. this bit is 1, when any of the following conditions is true: - The system time value is equal to or exceeds the value you programmed in the MAC_PPS(#i)_Target_Time_Seconds and MAC_PPS(#i)_Target_Time_Nanoseconds. - An overflow in the MAC_System_Time_Seconds register. - Timestamp Target Time Error occurred. That is, the time you programmed in the MAC_PPS(#i)_Target_Time_Seconds and MAC_PPS(#i)_Target_Time_Nanoseconds has elapsed. - When the auxiliary snapshot trigger is asserted. - when the MAC updates the captured transmit timestamp in the MAC_Tx_Timestamp_Status_Nanoseconds and Mac_TxTimestamp_Status_Seconds registers. - MAC writes 0 to this bit when - Application reads the corresponding interrupt source bit in the MAC_Timestamp_Status register. - Application writes 1 to the corresponding interrupt source bit in the MAC_Timestamp_Status register, when RCWE = 1 in the MAC_CSR_SW_Ctrl register. 0b - Timestamp Interrupt status not active 1b - Timestamp Interrupt status active

pub const fn set_tsis(&mut self, val: bool)

Read-only. Timestamp Interrupt Status. this bit is 1, when any of the following conditions is true: - The system time value is equal to or exceeds the value you programmed in the MAC_PPS(#i)_Target_Time_Seconds and MAC_PPS(#i)_Target_Time_Nanoseconds. - An overflow in the MAC_System_Time_Seconds register. - Timestamp Target Time Error occurred. That is, the time you programmed in the MAC_PPS(#i)_Target_Time_Seconds and MAC_PPS(#i)_Target_Time_Nanoseconds has elapsed. - When the auxiliary snapshot trigger is asserted. - when the MAC updates the captured transmit timestamp in the MAC_Tx_Timestamp_Status_Nanoseconds and Mac_TxTimestamp_Status_Seconds registers. - MAC writes 0 to this bit when - Application reads the corresponding interrupt source bit in the MAC_Timestamp_Status register. - Application writes 1 to the corresponding interrupt source bit in the MAC_Timestamp_Status register, when RCWE = 1 in the MAC_CSR_SW_Ctrl register. 0b - Timestamp Interrupt status not active 1b - Timestamp Interrupt status active

pub const fn txstsis(&self) -> bool

Read-only. Transmit Status Interrupt. This bit indicates the status of transmitted packets. This bit is set when any of the following bits is set in the MAC_Rx_Tx_Status register: - Excessive Collision (EXCOL) - Late Collision (LCOL) - Excessive Deferral (EXDEF) - Loss of Carrier (LCARR) - No Carrier (NCARR) - Jabber Timeout (TJT) This bit is cleared when the corresponding interrupt source bit is read (or corresponding interrupt source bit is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set) in the MAC_Rx_Tx_Status register. 0b - Transmit Interrupt status not active 1b - Transmit Interrupt status active

pub const fn set_txstsis(&mut self, val: bool)

Read-only. Transmit Status Interrupt. This bit indicates the status of transmitted packets. This bit is set when any of the following bits is set in the MAC_Rx_Tx_Status register: - Excessive Collision (EXCOL) - Late Collision (LCOL) - Excessive Deferral (EXDEF) - Loss of Carrier (LCARR) - No Carrier (NCARR) - Jabber Timeout (TJT) This bit is cleared when the corresponding interrupt source bit is read (or corresponding interrupt source bit is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set) in the MAC_Rx_Tx_Status register. 0b - Transmit Interrupt status not active 1b - Transmit Interrupt status active

pub const fn rxstsis(&self) -> bool

Read-only. Receive Status Interrupt. This bit indicates the status of received packets. This bit is set when the RWT bit is set in the MAC_Rx_Tx_Status register. This bit is cleared when the corresponding interrupt source bit is read (or corresponding interrupt source bit is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set) in the MAC_Rx_Tx_Status register. 0b - Receive Interrupt status not active 1b - Receive Interrupt status active

pub const fn set_rxstsis(&mut self, val: bool)

Read-only. Receive Status Interrupt. This bit indicates the status of received packets. This bit is set when the RWT bit is set in the MAC_Rx_Tx_Status register. This bit is cleared when the corresponding interrupt source bit is read (or corresponding interrupt source bit is written to 1 when RCWE bit of MAC_CSR_SW_Ctrl register is set) in the MAC_Rx_Tx_Status register. 0b - Receive Interrupt status not active 1b - Receive Interrupt status active

pub const fn mdiois(&self) -> bool

MDIO Interrupt Status. - 1: Indicates to the application that MDIO operation is complete. - MAC writes 0 to this bit when the application reads this bit. Application can write 1 to clear this bit when RCWE = 1, in the MAC_CSR_SW_Ctrl register. Following access restrictions apply. - Clears on read - Clears on write 1, when RCWE = 1 in the MAC_CSR_SW_Ctrl register. - Self-set to 1 on internal event. 0b - MDIO Interrupt status not active 1b - MDIO Interrupt status active

pub const fn set_mdiois(&mut self, val: bool)

MDIO Interrupt Status. - 1: Indicates to the application that MDIO operation is complete. - MAC writes 0 to this bit when the application reads this bit. Application can write 1 to clear this bit when RCWE = 1, in the MAC_CSR_SW_Ctrl register. Following access restrictions apply. - Clears on read - Clears on write 1, when RCWE = 1 in the MAC_CSR_SW_Ctrl register. - Self-set to 1 on internal event. 0b - MDIO Interrupt status not active 1b - MDIO Interrupt status active

Trait Implementations

impl Clone for MacInterruptStatus

fn clone(&self) -> MacInterruptStatus

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for MacInterruptStatus

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for MacInterruptStatus

fn default() -> MacInterruptStatus

Returns the “default value” for a type.

impl PartialEq for MacInterruptStatus

fn eq(&self, other: &MacInterruptStatus) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for MacInterruptStatus

impl Eq for MacInterruptStatus

impl StructuralPartialEq for MacInterruptStatus