pub struct Enet { /* private fields */ }Expand description
MCX-A5 10/100 Ethernet QoS controller at ENET0 MAC base 0x4001c000. One MTL Tx/Rx queue and one DMA Tx/Rx channel; no generic-IP queue/channel arrays. Only the actual registers in the chapter 51.7 maps are exposed, not their generic “up to” counts. Feature reset words describe the fixed implementation: 32-bit addresses, 2 KiB Tx/Rx FIFOs, one MAC address, no TSO, hash table, AV/DCB, split-header, L3/L4 filters or PTP offload. PPSOUTNUM resets to zero despite mapped PPS registers; register presence is not a claim of an external PPS output. Raw numeric encodings must obey the manual and implemented features; generic prose mentioning absent options is not capability evidence. RCWE changes selected read-clear flags to write-one-to-clear; five map/XML read-only registers are ReadWrite here because detailed descriptions explicitly require acknowledgement writes. Reads can consume status/FIFO data. Avoid read-modify-write on mixed status/control registers. Per-field read-only restrictions are documented, not enforced by the flat IR. reset_value is a software Default from documented reset tables, not a live hardware observation.
Implementations§
Source§impl Enet
impl Enet
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self
pub const fn as_ptr(&self) -> *mut ()
Sourcepub const fn mac_configuration(self) -> Reg<MacConfiguration, RW>
pub const fn mac_configuration(self) -> Reg<MacConfiguration, RW>
MAC Configuration.
Sourcepub const fn mac_ext_configuration(self) -> Reg<MacExtConfiguration, RW>
pub const fn mac_ext_configuration(self) -> Reg<MacExtConfiguration, RW>
MAC Extended Configuration.
Sourcepub const fn mac_packet_filter(self) -> Reg<MacPacketFilter, RW>
pub const fn mac_packet_filter(self) -> Reg<MacPacketFilter, RW>
MAC Packet Filter.
Sourcepub const fn mac_wd_jb_timeout(self) -> Reg<MacWdJbTimeout, RW>
pub const fn mac_wd_jb_timeout(self) -> Reg<MacWdJbTimeout, RW>
Watchdog and Jabber Timeout.
Sourcepub const fn mac_vlan_tag(self) -> Reg<MacVlanTag, RW>
pub const fn mac_vlan_tag(self) -> Reg<MacVlanTag, RW>
VLAN Tag.
Sourcepub const fn mac_vlan_incl(self) -> Reg<MacVlanIncl, RW>
pub const fn mac_vlan_incl(self) -> Reg<MacVlanIncl, RW>
VLAN Tag Inclusion or Replacement.
Sourcepub const fn mac_inner_vlan_incl(self) -> Reg<MacInnerVlanIncl, RW>
pub const fn mac_inner_vlan_incl(self) -> Reg<MacInnerVlanIncl, RW>
Inner VLAN Tag Inclusion or Replacement.
Sourcepub const fn mac_q0_tx_flow_ctrl(self) -> Reg<MacQ0TxFlowCtrl, RW>
pub const fn mac_q0_tx_flow_ctrl(self) -> Reg<MacQ0TxFlowCtrl, RW>
Queue 0 Transmit Flow Control.
Sourcepub const fn mac_rx_flow_ctrl(self) -> Reg<MacRxFlowCtrl, RW>
pub const fn mac_rx_flow_ctrl(self) -> Reg<MacRxFlowCtrl, RW>
Receive Flow Control.
Sourcepub const fn mac_interrupt_status(self) -> Reg<MacInterruptStatus, RW>
pub const fn mac_interrupt_status(self) -> Reg<MacInterruptStatus, RW>
Interrupt Status. MDIOIS and PHYIS clear on read by default; RCWE=1 selects write-one-to-clear. Other bits summarize their source registers. Access conflict: summary map and XML say read-only; detailed RCWE descriptions explicitly require acknowledgement writes, so this model exposes ReadWrite.
Sourcepub const fn mac_interrupt_enable(self) -> Reg<MacInterruptEnable, RW>
pub const fn mac_interrupt_enable(self) -> Reg<MacInterruptEnable, RW>
Interrupt Enable.
Sourcepub const fn mac_rx_tx_status(self) -> Reg<MacRxTxStatus, RW>
pub const fn mac_rx_tx_status(self) -> Reg<MacRxTxStatus, RW>
Receive Transmit Status. Status flags clear on read by default; RCWE=1 selects write-one-to-clear. Access conflict: summary map and XML say read-only; detailed RCWE descriptions explicitly require acknowledgement writes, so this model exposes ReadWrite.
Sourcepub const fn mac_pmt_control_status(self) -> Reg<MacPmtControlStatus, RW>
pub const fn mac_pmt_control_status(self) -> Reg<MacPmtControlStatus, RW>
PMT Control and Status. MGKPRCVD is clear-on-read by default and write-one-to-clear with RCWE=1. Avoid read-modify-write.
Sourcepub const fn mac_version(self) -> Reg<MacVersion, R>
pub const fn mac_version(self) -> Reg<MacVersion, R>
Version.
Sourcepub const fn mac_hw_feature0(self) -> Reg<MacHwFeature0, R>
pub const fn mac_hw_feature0(self) -> Reg<MacHwFeature0, R>
HW Features 0.
Sourcepub const fn mac_hw_feature1(self) -> Reg<MacHwFeature1, R>
pub const fn mac_hw_feature1(self) -> Reg<MacHwFeature1, R>
HW Features 1.
Sourcepub const fn mac_hw_feature2(self) -> Reg<MacHwFeature2, R>
pub const fn mac_hw_feature2(self) -> Reg<MacHwFeature2, R>
HW Features 2.
Sourcepub const fn mac_hw_feature3(self) -> Reg<MacHwFeature3, R>
pub const fn mac_hw_feature3(self) -> Reg<MacHwFeature3, R>
HW Features 3.
Sourcepub const fn mac_hw_feature4(self) -> Reg<MacHwFeature4, R>
pub const fn mac_hw_feature4(self) -> Reg<MacHwFeature4, R>
HW Features 4.
Sourcepub const fn mac_mdio_address(self) -> Reg<MacMdioAddress, RW>
pub const fn mac_mdio_address(self) -> Reg<MacMdioAddress, RW>
MDIO Address.
Sourcepub const fn mac_mdio_data(self) -> Reg<MacMdioData, RW>
pub const fn mac_mdio_data(self) -> Reg<MacMdioData, RW>
MDIO Data.
Sourcepub const fn mac_csr_sw_ctrl(self) -> Reg<MacCsrSwCtrl, RW>
pub const fn mac_csr_sw_ctrl(self) -> Reg<MacCsrSwCtrl, RW>
CSR Software Control.
Sourcepub const fn mac_address0_high(self) -> Reg<MacAddress0High, RW>
pub const fn mac_address0_high(self) -> Reg<MacAddress0High, RW>
MAC Address0 High.
Sourcepub const fn mac_address0_low(self) -> Reg<MacAddress0Low, RW>
pub const fn mac_address0_low(self) -> Reg<MacAddress0Low, RW>
MAC Address0 Low.
Sourcepub const fn mac_timestamp_control(self) -> Reg<MacTimestampControl, RW>
pub const fn mac_timestamp_control(self) -> Reg<MacTimestampControl, RW>
Timestamp Control.
Sourcepub const fn mac_sub_second_increment(self) -> Reg<MacSubSecondIncrement, RW>
pub const fn mac_sub_second_increment(self) -> Reg<MacSubSecondIncrement, RW>
Sub Second Increment.
Sourcepub const fn mac_system_time_seconds(self) -> Reg<MacSystemTimeSeconds, R>
pub const fn mac_system_time_seconds(self) -> Reg<MacSystemTimeSeconds, R>
System Time Seconds.
Sourcepub const fn mac_system_time_nanoseconds(
self,
) -> Reg<MacSystemTimeNanoseconds, R>
pub const fn mac_system_time_nanoseconds( self, ) -> Reg<MacSystemTimeNanoseconds, R>
System Time Nanoseconds.
Sourcepub const fn mac_system_time_seconds_update(
self,
) -> Reg<MacSystemTimeSecondsUpdate, RW>
pub const fn mac_system_time_seconds_update( self, ) -> Reg<MacSystemTimeSecondsUpdate, RW>
System Time Seconds Update.
Sourcepub const fn mac_system_time_nanoseconds_update(
self,
) -> Reg<MacSystemTimeNanosecondsUpdate, RW>
pub const fn mac_system_time_nanoseconds_update( self, ) -> Reg<MacSystemTimeNanosecondsUpdate, RW>
MAC System Time Nanoseconds Update.
Sourcepub const fn mac_timestamp_addend(self) -> Reg<MacTimestampAddend, RW>
pub const fn mac_timestamp_addend(self) -> Reg<MacTimestampAddend, RW>
Timestamp Addend.
Sourcepub const fn mac_timestamp_status(self) -> Reg<MacTimestampStatus, RW>
pub const fn mac_timestamp_status(self) -> Reg<MacTimestampStatus, RW>
Timestamp Status. Event flags clear on read by default; RCWE=1 selects write-one-to-clear for the documented acknowledgement bits. ATSNS is a FIFO count; TXTSSIS clears through the transmit timestamp seconds register. The function summary says bits 27:25 are excluded from read-clear, but the detailed ATSNS field spans 29:25; follow the detailed field description. Access conflict: summary map and XML say read-only; detailed RCWE descriptions explicitly require acknowledgement writes, so this model exposes ReadWrite.
Sourcepub const fn mac_rx_domain_time_incr(self) -> Reg<MacRxDomainTimeIncr, RW>
pub const fn mac_rx_domain_time_incr(self) -> Reg<MacRxDomainTimeIncr, RW>
Receive Domain TIme Increment.
Sourcepub const fn mac_tx_domain_time_incr(self) -> Reg<MacTxDomainTimeIncr, RW>
pub const fn mac_tx_domain_time_incr(self) -> Reg<MacTxDomainTimeIncr, RW>
Transmit Domain TIme Increment.
Sourcepub const fn mac_tx_timestamp_status_nanoseconds(
self,
) -> Reg<MacTxTimestampStatusNanoseconds, R>
pub const fn mac_tx_timestamp_status_nanoseconds( self, ) -> Reg<MacTxTimestampStatusNanoseconds, R>
Transmit Timestamp Status Nanoseconds.
Sourcepub const fn mac_tx_timestamp_status_seconds(
self,
) -> Reg<MacTxTimestampStatusSeconds, RW>
pub const fn mac_tx_timestamp_status_seconds( self, ) -> Reg<MacTxTimestampStatusSeconds, RW>
Transmit Timestamp Status Seconds. Reading acknowledges the transmit timestamp status when RCWE=0; a write acknowledges it when RCWE=1. Writes do not set the timestamp. Access conflict: summary map and XML say read-only; detailed RCWE descriptions explicitly require acknowledgement writes, so this model exposes ReadWrite.
Sourcepub const fn mac_auxiliary_control(self) -> Reg<MacAuxiliaryControl, RW>
pub const fn mac_auxiliary_control(self) -> Reg<MacAuxiliaryControl, RW>
Auxiliary Timestamp Control.
Sourcepub const fn mac_auxiliary_timestamp_nanoseconds(
self,
) -> Reg<MacAuxiliaryTimestampNanoseconds, R>
pub const fn mac_auxiliary_timestamp_nanoseconds( self, ) -> Reg<MacAuxiliaryTimestampNanoseconds, R>
Auxiliary Timestamp Nanoseconds. Read nanoseconds before seconds: reading seconds advances the auxiliary timestamp FIFO with RCWE=0. With RCWE=1 write all ones to the seconds register to advance.
Sourcepub const fn mac_auxiliary_timestamp_seconds(
self,
) -> Reg<MacAuxiliaryTimestampSeconds, RW>
pub const fn mac_auxiliary_timestamp_seconds( self, ) -> Reg<MacAuxiliaryTimestampSeconds, RW>
Auxiliary Timestamp Seconds. Reading advances the auxiliary timestamp FIFO with RCWE=0. With RCWE=1 write all ones here to clear the current entry and load the next. Writes do not set the timestamp. Access conflict: summary map and XML say read-only; detailed RCWE descriptions explicitly require acknowledgement writes, so this model exposes ReadWrite.
Sourcepub const fn mac_timestamp_ingress_corr_nanosecond(
self,
) -> Reg<MacTimestampIngressCorrNanosecond, RW>
pub const fn mac_timestamp_ingress_corr_nanosecond( self, ) -> Reg<MacTimestampIngressCorrNanosecond, RW>
MAC Timestamp Ingress Correction Nanosecond.
Sourcepub const fn mac_timestamp_egress_corr_nanosecond(
self,
) -> Reg<MacTimestampEgressCorrNanosecond, RW>
pub const fn mac_timestamp_egress_corr_nanosecond( self, ) -> Reg<MacTimestampEgressCorrNanosecond, RW>
MAC Timestamp Egress Correction Nanosecond.
Sourcepub const fn mac_timestamp_ingress_latency(
self,
) -> Reg<MacTimestampIngressLatency, R>
pub const fn mac_timestamp_ingress_latency( self, ) -> Reg<MacTimestampIngressLatency, R>
MAC Timestamp Ingress Latency.
Sourcepub const fn mac_timestamp_egress_latency(
self,
) -> Reg<MacTimestampEgressLatency, R>
pub const fn mac_timestamp_egress_latency( self, ) -> Reg<MacTimestampEgressLatency, R>
MAC Timestamp Egress Latency.
Sourcepub const fn mac_pps_control(self) -> Reg<MacPpsControl, RW>
pub const fn mac_pps_control(self) -> Reg<MacPpsControl, RW>
PPS Control. The generic description includes flexible PPS commands, but PPSEN0 bit 4 is reserved and PPS width/interval registers are absent here. PPSOUTNUM resets to zero; do not infer a supported external PPS output or flexible pulse train from this mapped register.
Sourcepub const fn mac_pps0_target_time_seconds(
self,
) -> Reg<MacPps0TargetTimeSeconds, RW>
pub const fn mac_pps0_target_time_seconds( self, ) -> Reg<MacPps0TargetTimeSeconds, RW>
PPS Target Time Seconds.
Sourcepub const fn mac_pps0_target_time_nanoseconds(
self,
) -> Reg<MacPps0TargetTimeNanoseconds, RW>
pub const fn mac_pps0_target_time_nanoseconds( self, ) -> Reg<MacPps0TargetTimeNanoseconds, RW>
PPS0 Target Time Nanoseconds.