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MacHwFeature1

Struct MacHwFeature1 

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#[repr(transparent)]
pub struct MacHwFeature1(pub u32);
Expand description

F70RM Rev. 1 section 51.7.1.18; manual text line 150830.

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§0: u32

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impl MacHwFeature1

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pub const fn rxfifosize(&self) -> u8

Read-only. MTL Receive FIFO Size. This field contains the configured value of MTL Rx FIFO in bytes expressed as Log to base 2 minus 7, that is, Log2(RXFIFO_SIZE) -7: 0_0000b - 128 bytes 0_0001b - 256 bytes 0_0010b - 512 bytes 0_0011b - 1024 bytes 0_0100b - 2048 bytes 0_0101b - 4096 bytes 0_0110b - 8192 bytes 0_0111b - 16384 bytes 0_1000b - 32 KB 0_1001b - 64 KB 0_1010b - 128 KB 0_1011b - 256 KB 0_1100b - Reserved

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pub const fn set_rxfifosize(&mut self, val: u8)

Read-only. MTL Receive FIFO Size. This field contains the configured value of MTL Rx FIFO in bytes expressed as Log to base 2 minus 7, that is, Log2(RXFIFO_SIZE) -7: 0_0000b - 128 bytes 0_0001b - 256 bytes 0_0010b - 512 bytes 0_0011b - 1024 bytes 0_0100b - 2048 bytes 0_0101b - 4096 bytes 0_0110b - 8192 bytes 0_0111b - 16384 bytes 0_1000b - 32 KB 0_1001b - 64 KB 0_1010b - 128 KB 0_1011b - 256 KB 0_1100b - Reserved

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pub const fn spram(&self) -> bool

Read-only. Single Port RAM Enable. This bit is set to 1 when the Use single port RAM Feature is selected. 0b - Single Port RAM feature is not selected 1b - Single Port RAM feature is selected

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pub const fn set_spram(&mut self, val: bool)

Read-only. Single Port RAM Enable. This bit is set to 1 when the Use single port RAM Feature is selected. 0b - Single Port RAM feature is not selected 1b - Single Port RAM feature is selected

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pub const fn txfifosize(&self) -> u8

Read-only. MTL Transmit FIFO Size. This field contains the configured value of MTL Tx FIFO in bytes expressed as Log to base 2 minus 7, that is, Log2(TXFIFO_SIZE) -7: 0_0000b - 128 bytes 0_0001b - 256 bytes 0_0010b - 512 bytes 0_0011b - 1024 bytes 0_0100b - 2048 bytes 0_0101b - 4096 bytes 0_0110b - 8192 bytes 0_0111b - 16384 bytes 0_1000b - 32 KB 0_1001b - 64 KB 0_1010b - 128 KB 0_1011b - Reserved

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pub const fn set_txfifosize(&mut self, val: u8)

Read-only. MTL Transmit FIFO Size. This field contains the configured value of MTL Tx FIFO in bytes expressed as Log to base 2 minus 7, that is, Log2(TXFIFO_SIZE) -7: 0_0000b - 128 bytes 0_0001b - 256 bytes 0_0010b - 512 bytes 0_0011b - 1024 bytes 0_0100b - 2048 bytes 0_0101b - 4096 bytes 0_0110b - 8192 bytes 0_0111b - 16384 bytes 0_1000b - 32 KB 0_1001b - 64 KB 0_1010b - 128 KB 0_1011b - Reserved

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pub const fn osten(&self) -> bool

Read-only. One-Step Timestamping Enable. This bit is set to 1 when the Enable One-Step Timestamp Feature is selected. 0b - One-Step Timestamping feature is not selected 1b - One-Step Timestamping feature is selected

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pub const fn set_osten(&mut self, val: bool)

Read-only. One-Step Timestamping Enable. This bit is set to 1 when the Enable One-Step Timestamp Feature is selected. 0b - One-Step Timestamping feature is not selected 1b - One-Step Timestamping feature is selected

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pub const fn ptoen(&self) -> bool

Read-only. PTP Offload Enable. This bit is set to 1 when the Enable PTP Timestamp Offload Feature is selected. 0b - PTP Offload feature is not selected 1b - PTP Offload feature is selected

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pub const fn set_ptoen(&mut self, val: bool)

Read-only. PTP Offload Enable. This bit is set to 1 when the Enable PTP Timestamp Offload Feature is selected. 0b - PTP Offload feature is not selected 1b - PTP Offload feature is selected

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pub const fn advthword(&self) -> bool

Read-only. IEEE 1588 High Word Register Enable. This bit is set to 1 when the Add IEEE 1588 Higher Word Register option is selected 0b - IEEE 1588 High Word Register option is not selected 1b - IEEE 1588 High Word Register option is selected

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pub const fn set_advthword(&mut self, val: bool)

Read-only. IEEE 1588 High Word Register Enable. This bit is set to 1 when the Add IEEE 1588 Higher Word Register option is selected 0b - IEEE 1588 High Word Register option is not selected 1b - IEEE 1588 High Word Register option is selected

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pub const fn addr64(&self) -> u8

Read-only. Address Width.. This field indicates the configured address width: 00b - 32 01b - 40 10b - 48 11b - Reserved

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pub const fn set_addr64(&mut self, val: u8)

Read-only. Address Width.. This field indicates the configured address width: 00b - 32 01b - 40 10b - 48 11b - Reserved

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pub const fn dcben(&self) -> bool

Read-only. DCB Feature Enable. This bit is set to 1 when the Enable Data Center Bridging option is selected 0b - DCB Feature is not selected 1b - DCB Feature is selected

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pub const fn set_dcben(&mut self, val: bool)

Read-only. DCB Feature Enable. This bit is set to 1 when the Enable Data Center Bridging option is selected 0b - DCB Feature is not selected 1b - DCB Feature is selected

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pub const fn sphen(&self) -> bool

Read-only. Split Header Feature Enable. This bit is set to 1 when the Enable Split Header Structure option is selected 0b - Split Header Feature is not selected 1b - Split Header Feature is selected

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pub const fn set_sphen(&mut self, val: bool)

Read-only. Split Header Feature Enable. This bit is set to 1 when the Enable Split Header Structure option is selected 0b - Split Header Feature is not selected 1b - Split Header Feature is selected

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pub const fn tsoen(&self) -> bool

Read-only. TCP Segmentation Offload Enable. This bit is set to 1 when the Enable TCP Segmentation Offloading for TCP/IP Packets option is selected 0b - TCP Segmentation Offload Feature is not selected 1b - TCP Segmentation Offload Feature is selected

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pub const fn set_tsoen(&mut self, val: bool)

Read-only. TCP Segmentation Offload Enable. This bit is set to 1 when the Enable TCP Segmentation Offloading for TCP/IP Packets option is selected 0b - TCP Segmentation Offload Feature is not selected 1b - TCP Segmentation Offload Feature is selected

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pub const fn dbgmema(&self) -> bool

Read-only. DMA Debug Registers Enable. This bit is set to 1 when the Debug Mode Enable option is selected 0b - DMA Debug Registers option is not selected 1b - DMA Debug Registers option is selected

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pub const fn set_dbgmema(&mut self, val: bool)

Read-only. DMA Debug Registers Enable. This bit is set to 1 when the Debug Mode Enable option is selected 0b - DMA Debug Registers option is not selected 1b - DMA Debug Registers option is selected

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pub const fn pouost(&self) -> bool

Read-only. One Step for PTP over UDP/IP Feature Enable. This bit is set to 1 when the Enable One step timestamp for PTP over UDP/IP feature is selected. 0b - One Step for PTP over UDP/IP Feature is not selected 1b - One Step for PTP over UDP/IP Feature is selected

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pub const fn set_pouost(&mut self, val: bool)

Read-only. One Step for PTP over UDP/IP Feature Enable. This bit is set to 1 when the Enable One step timestamp for PTP over UDP/IP feature is selected. 0b - One Step for PTP over UDP/IP Feature is not selected 1b - One Step for PTP over UDP/IP Feature is selected

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pub const fn hashtblsz(&self) -> u8

Read-only. Hash Table Size. This field indicates the size of the hash table: 00b - No hash table 01b - 64 10b - 128 11b - 256

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pub const fn set_hashtblsz(&mut self, val: u8)

Read-only. Hash Table Size. This field indicates the size of the hash table: 00b - No hash table 01b - 64 10b - 128 11b - 256

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pub const fn l3l4fnum(&self) -> u8

Read-only. Total number of L3 or L4 Filters. This field indicates the total number of L3 or L4 filters: 0000b - No L3 or L4 Filter 0001b - 1 L3 or L4 Filter 0010b - 2 L3 or L4 Filters 0011b - 3 L3 or L4 Filters 0100b - 4 L3 or L4 Filters 0101b - 5 L3 or L4 Filters 0110b - 6 L3 or L4 Filters 0111b - 7 L3 or L4 Filters 1000b - 8 L3 or L4 Filters

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pub const fn set_l3l4fnum(&mut self, val: u8)

Read-only. Total number of L3 or L4 Filters. This field indicates the total number of L3 or L4 filters: 0000b - No L3 or L4 Filter 0001b - 1 L3 or L4 Filter 0010b - 2 L3 or L4 Filters 0011b - 3 L3 or L4 Filters 0100b - 4 L3 or L4 Filters 0101b - 5 L3 or L4 Filters 0110b - 6 L3 or L4 Filters 0111b - 7 L3 or L4 Filters 1000b - 8 L3 or L4 Filters

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impl Clone for MacHwFeature1

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fn clone(&self) -> MacHwFeature1

Returns a duplicate of the value. Read more
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fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl Debug for MacHwFeature1

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Default for MacHwFeature1

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fn default() -> MacHwFeature1

Returns the “default value” for a type. Read more
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impl PartialEq for MacHwFeature1

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fn eq(&self, other: &MacHwFeature1) -> bool

Tests for self and other values to be equal, and is used by ==.
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fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
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impl Copy for MacHwFeature1

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impl Eq for MacHwFeature1

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impl StructuralPartialEq for MacHwFeature1

Auto Trait Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.