Struct DmaDebugStatus0 

#[repr(transparent)]
pub struct DmaDebugStatus0(pub u32);

F70RM Rev. 1 section 51.7.4.5; manual text line 155517.

Tuple Fields

0: u32

Implementations

impl DmaDebugStatus0

pub const fn axwhsts(&self) -> bool

Read-only. AHB Master Status. When high, this bit indicates that the AHB master FSMs are in the non-idle state. 0b - AXI Master Write Channel or AHB Master Status not detected 1b - AXI Master Write Channel or AHB Master Status detected

pub const fn set_axwhsts(&mut self, val: bool)

Read-only. AHB Master Status. When high, this bit indicates that the AHB master FSMs are in the non-idle state. 0b - AXI Master Write Channel or AHB Master Status not detected 1b - AXI Master Write Channel or AHB Master Status detected

pub const fn rps0(&self) -> u8

Read-only. DMA Channel 0 Receive Process State. This field indicates the Rx DMA FSM state for Channel 0. The MSB of this field always returns 0. This field does not generate an interrupt. 0000b - Stopped (Reset or Stop Receive Command issued) 0001b - Running (Fetching Rx Transfer Descriptor) 0010b - Reserved for future use 0011b - Running (Waiting for Rx packet) 0100b - Suspended (Rx Descriptor Unavailable) 0101b - Running (Closing the Rx Descriptor) 0110b - Timestamp write state 0111b - Running (Transferring the received packet data from the Rx buffer to the system memory)

pub const fn set_rps0(&mut self, val: u8)

Read-only. DMA Channel 0 Receive Process State. This field indicates the Rx DMA FSM state for Channel 0. The MSB of this field always returns 0. This field does not generate an interrupt. 0000b - Stopped (Reset or Stop Receive Command issued) 0001b - Running (Fetching Rx Transfer Descriptor) 0010b - Reserved for future use 0011b - Running (Waiting for Rx packet) 0100b - Suspended (Rx Descriptor Unavailable) 0101b - Running (Closing the Rx Descriptor) 0110b - Timestamp write state 0111b - Running (Transferring the received packet data from the Rx buffer to the system memory)

pub const fn tps0(&self) -> u8

Read-only. DMA Channel 0 Transmit Process State. This field indicates the Tx DMA FSM state for Channel 0. The MSB of this field always returns 0. This field does not generate an interrupt. 0000b - Stopped (Reset or Stop Transmit Command issued) 0001b - Running (Fetching Tx Transfer Descriptor) 0010b - Running (Waiting for status) 0011b - Running (Reading Data from system memory buffer and queuing it to the Tx buffer (Tx FIFO)) 0100b - Timestamp write state 0101b - Reserved for future use 0110b - Suspended (Tx Descriptor Unavailable or Tx Buffer Underflow) 0111b - Running (Closing Tx Descriptor)

pub const fn set_tps0(&mut self, val: u8)

Read-only. DMA Channel 0 Transmit Process State. This field indicates the Tx DMA FSM state for Channel 0. The MSB of this field always returns 0. This field does not generate an interrupt. 0000b - Stopped (Reset or Stop Transmit Command issued) 0001b - Running (Fetching Tx Transfer Descriptor) 0010b - Running (Waiting for status) 0011b - Running (Reading Data from system memory buffer and queuing it to the Tx buffer (Tx FIFO)) 0100b - Timestamp write state 0101b - Reserved for future use 0110b - Suspended (Tx Descriptor Unavailable or Tx Buffer Underflow) 0111b - Running (Closing Tx Descriptor)

Trait Implementations

impl Clone for DmaDebugStatus0

fn clone(&self) -> DmaDebugStatus0

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for DmaDebugStatus0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for DmaDebugStatus0

fn default() -> DmaDebugStatus0

Returns the “default value” for a type.

impl PartialEq for DmaDebugStatus0

fn eq(&self, other: &DmaDebugStatus0) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for DmaDebugStatus0

impl Eq for DmaDebugStatus0

impl StructuralPartialEq for DmaDebugStatus0