#[repr(transparent)]pub struct DmaSysbusMode(pub u32);Expand description
F70RM Rev. 1 section 51.7.4.3; manual text line 155217.
Tuple Fields§
§0: u32Implementations§
Source§impl DmaSysbusMode
impl DmaSysbusMode
Sourcepub const fn fb(&self) -> bool
pub const fn fb(&self) -> bool
Fixed Burst Length. - 1: AHB master initiates burst transfers of specified length (INCRx or SINGLE). - 0: AHB master initiates transfers of unspecified length (INCR) or SINGLE transfers. 0b - Fixed Burst Length is disabled 1b - Fixed Burst Length is enabled
Sourcepub const fn set_fb(&mut self, val: bool)
pub const fn set_fb(&mut self, val: bool)
Fixed Burst Length. - 1: AHB master initiates burst transfers of specified length (INCRx or SINGLE). - 0: AHB master initiates transfers of unspecified length (INCR) or SINGLE transfers. 0b - Fixed Burst Length is disabled 1b - Fixed Burst Length is enabled
Sourcepub const fn aal(&self) -> bool
pub const fn aal(&self) -> bool
Address-Aligned Beats. - 1: The EQOS-AHB master performs address-aligned burst transfers on Read and Write channels. - 0: The EQOS-AHB master performs burst transfers on Read and Write channels without aligning to address boundaries. 0b - Address-Aligned Beats is disabled 1b - Address-Aligned Beats is enabled
Sourcepub const fn set_aal(&mut self, val: bool)
pub const fn set_aal(&mut self, val: bool)
Address-Aligned Beats. - 1: The EQOS-AHB master performs address-aligned burst transfers on Read and Write channels. - 0: The EQOS-AHB master performs burst transfers on Read and Write channels without aligning to address boundaries. 0b - Address-Aligned Beats is disabled 1b - Address-Aligned Beats is enabled
Sourcepub const fn mb(&self) -> bool
pub const fn mb(&self) -> bool
Mixed Burst. When this bit is high and the FB bit is low, the AHB master performs undefined bursts transfers (INCR) for burst length of 16 or more. For burst length of 16 or less, the AHB master performs fixed burst transfers (INCRx and SINGLE). 0b - Mixed Burst is disabled 1b - Mixed Burst is enabled
Sourcepub const fn set_mb(&mut self, val: bool)
pub const fn set_mb(&mut self, val: bool)
Mixed Burst. When this bit is high and the FB bit is low, the AHB master performs undefined bursts transfers (INCR) for burst length of 16 or more. For burst length of 16 or less, the AHB master performs fixed burst transfers (INCRx and SINGLE). 0b - Mixed Burst is disabled 1b - Mixed Burst is enabled
Sourcepub const fn rb(&self) -> bool
pub const fn rb(&self) -> bool
Rebuild INCRx Burst. When this bit is 1 and the AHB master gets SPLIT, RETRY, or Early Burst Termination (EBT) response, the AHB master interface rebuilds the pending beats of any initiated burst transfer with INCRx and SINGLE transfers. By default, the AHB master interface rebuilds the pending beats of an EBT with an unspecified (INCR) burst. 0b - Rebuild INCRx Burst is disabled 1b - Rebuild INCRx Burst is enabled
Sourcepub const fn set_rb(&mut self, val: bool)
pub const fn set_rb(&mut self, val: bool)
Rebuild INCRx Burst. When this bit is 1 and the AHB master gets SPLIT, RETRY, or Early Burst Termination (EBT) response, the AHB master interface rebuilds the pending beats of any initiated burst transfer with INCRx and SINGLE transfers. By default, the AHB master interface rebuilds the pending beats of an EBT with an unspecified (INCR) burst. 0b - Rebuild INCRx Burst is disabled 1b - Rebuild INCRx Burst is enabled
Trait Implementations§
Source§impl Clone for DmaSysbusMode
impl Clone for DmaSysbusMode
Source§fn clone(&self) -> DmaSysbusMode
fn clone(&self) -> DmaSysbusMode
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more