#[repr(u8)]pub enum SmartDmaTrigInp {
Show 128 variants
_RESERVED_0 = 0,
VAL1 = 1,
VAL2 = 2,
VAL3 = 3,
VAL4 = 4,
VAL5 = 5,
VAL6 = 6,
VAL7 = 7,
VAL8 = 8,
VAL9 = 9,
VAL10 = 10,
VAL11 = 11,
VAL12 = 12,
VAL13 = 13,
VAL14 = 14,
VAL15 = 15,
VAL16 = 16,
VAL17 = 17,
VAL18 = 18,
VAL19 = 19,
VAL20 = 20,
VAL21 = 21,
VAL22 = 22,
VAL23 = 23,
VAL24 = 24,
VAL25 = 25,
_RESERVED_1a = 26,
VAL27 = 27,
_RESERVED_1c = 28,
VAL29 = 29,
VAL30 = 30,
VAL31 = 31,
VAL32 = 32,
VAL33 = 33,
VAL34 = 34,
VAL35 = 35,
VAL36 = 36,
VAL37 = 37,
VAL38 = 38,
VAL39 = 39,
VAL40 = 40,
_RESERVED_29 = 41,
_RESERVED_2a = 42,
_RESERVED_2b = 43,
_RESERVED_2c = 44,
VAL45 = 45,
_RESERVED_2e = 46,
VAL47 = 47,
VAL48 = 48,
VAL49 = 49,
VAL50 = 50,
VAL51 = 51,
VAL52 = 52,
VAL53 = 53,
VAL54 = 54,
VAL55 = 55,
VAL56 = 56,
VAL57 = 57,
VAL58 = 58,
VAL59 = 59,
VAL60 = 60,
VAL61 = 61,
VAL62 = 62,
VAL63 = 63,
VAL64 = 64,
VAL65 = 65,
_RESERVED_42 = 66,
VAL67 = 67,
VAL68 = 68,
VAL69 = 69,
_RESERVED_46 = 70,
_RESERVED_47 = 71,
VAL72 = 72,
_RESERVED_49 = 73,
_RESERVED_4a = 74,
VAL75 = 75,
_RESERVED_4c = 76,
_RESERVED_4d = 77,
VAL78 = 78,
_RESERVED_4f = 79,
VAL80 = 80,
VAL81 = 81,
VAL82 = 82,
VAL83 = 83,
VAL84 = 84,
VAL85 = 85,
VAL86 = 86,
VAL87 = 87,
VAL88 = 88,
_RESERVED_59 = 89,
_RESERVED_5a = 90,
_RESERVED_5b = 91,
_RESERVED_5c = 92,
_RESERVED_5d = 93,
_RESERVED_5e = 94,
_RESERVED_5f = 95,
_RESERVED_60 = 96,
_RESERVED_61 = 97,
_RESERVED_62 = 98,
_RESERVED_63 = 99,
_RESERVED_64 = 100,
_RESERVED_65 = 101,
_RESERVED_66 = 102,
_RESERVED_67 = 103,
_RESERVED_68 = 104,
_RESERVED_69 = 105,
_RESERVED_6a = 106,
_RESERVED_6b = 107,
_RESERVED_6c = 108,
_RESERVED_6d = 109,
_RESERVED_6e = 110,
_RESERVED_6f = 111,
_RESERVED_70 = 112,
_RESERVED_71 = 113,
_RESERVED_72 = 114,
_RESERVED_73 = 115,
_RESERVED_74 = 116,
_RESERVED_75 = 117,
_RESERVED_76 = 118,
_RESERVED_77 = 119,
_RESERVED_78 = 120,
_RESERVED_79 = 121,
_RESERVED_7a = 122,
_RESERVED_7b = 123,
_RESERVED_7c = 124,
_RESERVED_7d = 125,
_RESERVED_7e = 126,
_RESERVED_7f = 127,
}Variants§
_RESERVED_0 = 0
VAL1 = 1
GPIO P0_16 input is selected
VAL2 = 2
GPIO P0_17 input is selected
VAL3 = 3
GPIO P1_8 input is selected
VAL4 = 4
GPIO P1_9 input is selected
VAL5 = 5
GPIO P1_10 input is selected
VAL6 = 6
GPIO P1_11 input is selected
VAL7 = 7
GPIO P1_12 input is selected
VAL8 = 8
GPIO P1_13 input is selected
VAL9 = 9
GPIO P2_0 input is selected
VAL10 = 10
GPIO P2_1 input is selected
VAL11 = 11
GPIO P2_2 input is selected
VAL12 = 12
GPIO P2_3 input is selected
VAL13 = 13
GPIO P2_6 input is selected
VAL14 = 14
GPIO P3_8 input is selected
VAL15 = 15
GPIO P3_9 input is selected
VAL16 = 16
GPIO P3_10 input is selected
VAL17 = 17
GPIO P3_11 input is selected
VAL18 = 18
GPIO P3_12 input is seclected
VAL19 = 19
GPIO0 Pin Event Trig input is selected
VAL20 = 20
GPIO1 Pin Event Trig input is selected
VAL21 = 21
GPIO2 Pin Event Trig input is selected
VAL22 = 22
GPIO3 Pin Event Trig input is selected
VAL23 = 23
GPIO4 Pin Event Trig input is selected
VAL24 = 24
ARM_TXEV input is selected
VAL25 = 25
AOI0_OUT0 input is selected
_RESERVED_1a = 26
VAL27 = 27
DMA_IRQ input is selected
_RESERVED_1c = 28
VAL29 = 29
WUU_IRQ input is selected
VAL30 = 30
CTimer0_MAT2 input is selected
VAL31 = 31
CTimer0_MAT3 input is selected
VAL32 = 32
CTimer1_MAT2 input is selected
VAL33 = 33
CTimer1_MAT3 input is selected
VAL34 = 34
CTimer2_MAT2 input is selected
VAL35 = 35
CTimer2_MAT3 input is selected
VAL36 = 36
CTimer3_MAT2 input is selected
VAL37 = 37
CTimer3_MAT3 input is selected
VAL38 = 38
CTimer4_MAT2 input is selected
VAL39 = 39
CTimer4_MAT3 input is selected
VAL40 = 40
OSTIMER_IRQ input is selected
_RESERVED_29 = 41
_RESERVED_2a = 42
_RESERVED_2b = 43
_RESERVED_2c = 44
VAL45 = 45
RTC_Alarm_IRQ input is selected
_RESERVED_2e = 46
VAL47 = 47
uTICK_IRQ input is selected
VAL48 = 48
WDT_IRQ input is selected
VAL49 = 49
Wakeup_Timer_IRQ input is selected
VAL50 = 50
CAN0_IRQ input is selected
VAL51 = 51
CAN1_IRQ input is selected
VAL52 = 52
FlexIO0_IRQ input is selected
VAL53 = 53
FlexIO0_Shifer0_DMA_Req input is selected
VAL54 = 54
FlexIO0_Shifer1_DMA_Req input is selected
VAL55 = 55
FlexIO0_Shifer2_DMA_Req input is selected
VAL56 = 56
FlexIO0_Shifer3_DMA_Req input is selected
VAL57 = 57
I3C0_IRQ input is selected
VAL58 = 58
LPI2C0_IRQ input is selected
VAL59 = 59
LPI2C1_IRQ input is selected
VAL60 = 60
LPSPI0_IRQ input is selected
VAL61 = 61
LPSPI1_IRQ input is selected
VAL62 = 62
LPUART0_IRQ input is selected
VAL63 = 63
LPUART1_IRQ input is selected
VAL64 = 64
LPUART2_IRQ input is selected
VAL65 = 65
LPUART3_IRQ input is selected
_RESERVED_42 = 66
VAL67 = 67
USB1 Start of Frame input is selected
VAL68 = 68
ADC0_IRQ input is selected
VAL69 = 69
ADC1_IRQ input is selected
_RESERVED_46 = 70
_RESERVED_47 = 71
VAL72 = 72
CMP0_IRQ input is selected
_RESERVED_49 = 73
_RESERVED_4a = 74
VAL75 = 75
CMP0_OUT input is selected
_RESERVED_4c = 76
_RESERVED_4d = 77
VAL78 = 78
DAC0_IRQ input is selected
_RESERVED_4f = 79
VAL80 = 80
DMA1_IRQ input is selected
VAL81 = 81
DAC1_IRQ input is selected
VAL82 = 82
TSI0_End_of_Scan_IRQ input is selected
VAL83 = 83
TSI0_Out_of_Range_IRQ input is selected
VAL84 = 84
ENET QOS IRQ input is selected
VAL85 = 85
10BASE_T1S IRQ input is selected
VAL86 = 86
ERM Interrupt input is selected
VAL87 = 87
TMPR_OUT0 input is selected
VAL88 = 88
TMPR_OUT1 input is selected
_RESERVED_59 = 89
_RESERVED_5a = 90
_RESERVED_5b = 91
_RESERVED_5c = 92
_RESERVED_5d = 93
_RESERVED_5e = 94
_RESERVED_5f = 95
_RESERVED_60 = 96
_RESERVED_61 = 97
_RESERVED_62 = 98
_RESERVED_63 = 99
_RESERVED_64 = 100
_RESERVED_65 = 101
_RESERVED_66 = 102
_RESERVED_67 = 103
_RESERVED_68 = 104
_RESERVED_69 = 105
_RESERVED_6a = 106
_RESERVED_6b = 107
_RESERVED_6c = 108
_RESERVED_6d = 109
_RESERVED_6e = 110
_RESERVED_6f = 111
_RESERVED_70 = 112
_RESERVED_71 = 113
_RESERVED_72 = 114
_RESERVED_73 = 115
_RESERVED_74 = 116
_RESERVED_75 = 117
_RESERVED_76 = 118
_RESERVED_77 = 119
_RESERVED_78 = 120
_RESERVED_79 = 121
_RESERVED_7a = 122
_RESERVED_7b = 123
_RESERVED_7c = 124
_RESERVED_7d = 125
_RESERVED_7e = 126
_RESERVED_7f = 127
Implementations§
Trait Implementations§
Source§impl Clone for SmartDmaTrigInp
impl Clone for SmartDmaTrigInp
Source§fn clone(&self) -> SmartDmaTrigInp
fn clone(&self) -> SmartDmaTrigInp
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more