Struct Dma0ReqEnable3 

#[repr(transparent)]
pub struct Dma0ReqEnable3(pub u32);

DMA0 Request Enable3

Tuple Fields

0: u32

Implementations

impl Dma0ReqEnable3

pub const fn req96_en0(&self) -> Req96En0

This register is used to enable and disable I3C0 transmit request.

pub const fn set_req96_en0(&mut self, val: Req96En0)

This register is used to enable and disable I3C0 transmit request.

pub const fn req97_en0(&self) -> Req97En0

This register is used to enable and disable I3C1 receive request.

pub const fn set_req97_en0(&mut self, val: Req97En0)

This register is used to enable and disable I3C1 receive request.

pub const fn req98_en0(&self) -> Req98En0

This register is used to enable and disable I3C1 transmit request.

pub const fn set_req98_en0(&mut self, val: Req98En0)

This register is used to enable and disable I3C1 transmit request.

pub const fn req99_en0(&self) -> Req99En0

This register is used to enable and disable SAI0 receive request.

pub const fn set_req99_en0(&mut self, val: Req99En0)

This register is used to enable and disable SAI0 receive request.

pub const fn req100_en0(&self) -> Req100En0

This register is used to enable and disable SAI0 transmit request.

pub const fn set_req100_en0(&mut self, val: Req100En0)

This register is used to enable and disable SAI0 transmit request.

pub const fn req101_en0(&self) -> Req101En0

This register is used to enable and disable SAI1 receive request.

pub const fn set_req101_en0(&mut self, val: Req101En0)

This register is used to enable and disable SAI1 receive request.

pub const fn req102_en0(&self) -> Req102En0

This register is used to enable and disable SAI1 transmit request.

pub const fn set_req102_en0(&mut self, val: Req102En0)

This register is used to enable and disable SAI1 transmit request.

pub const fn req103_en0(&self) -> Req103En0

This register is used to enable and disable SINC0 ipd_req_sinc[0] or ipd_req_alt [0] request.

pub const fn set_req103_en0(&mut self, val: Req103En0)

This register is used to enable and disable SINC0 ipd_req_sinc[0] or ipd_req_alt [0] request.

pub const fn req104_en0(&self) -> Req104En0

This register is used to enable and disable SINC0 ipd_req_sinc[1] or ipd_req_alt [1] request.

pub const fn set_req104_en0(&mut self, val: Req104En0)

This register is used to enable and disable SINC0 ipd_req_sinc[1] or ipd_req_alt [1] request.

pub const fn req105_en0(&self) -> Req105En0

This register is used to enable and disable SINC0 ipd_req_sinc[2] or ipd_req_alt [2] request.

pub const fn set_req105_en0(&mut self, val: Req105En0)

This register is used to enable and disable SINC0 ipd_req_sinc[2] or ipd_req_alt [2] request.

pub const fn req106_en0(&self) -> Req106En0

This register is used to enable and disable SINC0 ipd_req_sinc[3] or ipd_req_alt [3] request.

pub const fn set_req106_en0(&mut self, val: Req106En0)

This register is used to enable and disable SINC0 ipd_req_sinc[3] or ipd_req_alt [3] request.

pub const fn req107_en0(&self) -> Req107En0

This register is used to enable and disable SINC0 ipd_req_sinc[4] or ipd_req_alt [4] request.

pub const fn set_req107_en0(&mut self, val: Req107En0)

This register is used to enable and disable SINC0 ipd_req_sinc[4] or ipd_req_alt [4] request.

pub const fn req108_en0(&self) -> Req108En0

This register is used to enable and disable GPIO0 pin event request 0.

pub const fn set_req108_en0(&mut self, val: Req108En0)

This register is used to enable and disable GPIO0 pin event request 0.

pub const fn req109_en0(&self) -> Req109En0

This register is used to enable and disable GPIO0 pin event request 1.

pub const fn set_req109_en0(&mut self, val: Req109En0)

This register is used to enable and disable GPIO0 pin event request 1.

pub const fn req110_en0(&self) -> Req110En0

This register is used to enable and disable GPIO1 pin event request 0.

pub const fn set_req110_en0(&mut self, val: Req110En0)

This register is used to enable and disable GPIO1 pin event request 0.

pub const fn req111_en0(&self) -> Req111En0

This register is used to enable and disable GPIO1 pin event request 1.

pub const fn set_req111_en0(&mut self, val: Req111En0)

This register is used to enable and disable GPIO1 pin event request 1.

pub const fn req112_en0(&self) -> Req112En0

This register is used to enable and disable GPIO2 pin event request 0.

pub const fn set_req112_en0(&mut self, val: Req112En0)

This register is used to enable and disable GPIO2 pin event request 0.

pub const fn req113_en0(&self) -> Req113En0

This register is used to enable and disable GPIO2 pin event request 1.

pub const fn set_req113_en0(&mut self, val: Req113En0)

This register is used to enable and disable GPIO2 pin event request 1.

pub const fn req114_en0(&self) -> Req114En0

This register is used to enable and disable GPIO3 pin event request 0.

pub const fn set_req114_en0(&mut self, val: Req114En0)

This register is used to enable and disable GPIO3 pin event request 0.

pub const fn req115_en0(&self) -> Req115En0

This register is used to enable and disable GPIO3 pin event request 1.

pub const fn set_req115_en0(&mut self, val: Req115En0)

This register is used to enable and disable GPIO3 pin event request 1.

pub const fn req116_en0(&self) -> Req116En0

This register is used to enable and disable GPIO4 pin event request 0.

pub const fn set_req116_en0(&mut self, val: Req116En0)

This register is used to enable and disable GPIO4 pin event request 0.

pub const fn req117_en0(&self) -> Req117En0

This register is used to enable and disable GPIO4 pin event request 1.

pub const fn set_req117_en0(&mut self, val: Req117En0)

This register is used to enable and disable GPIO4 pin event request 1.

pub const fn req118_en0(&self) -> Req118En0

This register is used to enable and disable GPIO5 pin event request 0.

pub const fn set_req118_en0(&mut self, val: Req118En0)

This register is used to enable and disable GPIO5 pin event request 0.

pub const fn req119_en0(&self) -> Req119En0

This register is used to enable and disable GPIO5 pin event request 1.

pub const fn set_req119_en0(&mut self, val: Req119En0)

This register is used to enable and disable GPIO5 pin event request 1.

pub const fn req120_en0(&self) -> Req120En0

This register is used to enable and disable TSI0 end of scan request.

pub const fn set_req120_en0(&mut self, val: Req120En0)

This register is used to enable and disable TSI0 end of scan request.

pub const fn req121_en0(&self) -> Req121En0

This register is used to enable and disable TSI0 out of range request.

pub const fn set_req121_en0(&mut self, val: Req121En0)

This register is used to enable and disable TSI0 out of range request.

Trait Implementations

impl Clone for Dma0ReqEnable3

fn clone(&self) -> Dma0ReqEnable3

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Dma0ReqEnable3

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Dma0ReqEnable3

fn default() -> Dma0ReqEnable3

Returns the “default value” for a type.

impl PartialEq for Dma0ReqEnable3

fn eq(&self, other: &Dma0ReqEnable3) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Dma0ReqEnable3

impl Eq for Dma0ReqEnable3

impl StructuralPartialEq for Dma0ReqEnable3