Struct Dma1ReqEnable2Clr 

#[repr(transparent)]
pub struct Dma1ReqEnable2Clr(pub u32);

DMA1 Request Enable2

Tuple Fields

0: u32

Implementations

impl Dma1ReqEnable2Clr

pub const fn req64_en1(&self) -> bool

Writing a 1 to REQ64_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req64_en1(&mut self, val: bool)

Writing a 1 to REQ64_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req65_en1(&self) -> bool

Writing a 1 to REQ65_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req65_en1(&mut self, val: bool)

Writing a 1 to REQ65_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req66_en1(&self) -> bool

Writing a 1 to REQ66_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req66_en1(&mut self, val: bool)

Writing a 1 to REQ66_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req67_en1(&self) -> bool

Writing a 1 to REQ67_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req67_en1(&mut self, val: bool)

Writing a 1 to REQ67_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req68_en1(&self) -> bool

Writing a 1 to REQ68_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req68_en1(&mut self, val: bool)

Writing a 1 to REQ68_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req69_en1(&self) -> bool

Writing a 1 to REQ69_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req69_en1(&mut self, val: bool)

Writing a 1 to REQ69_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req70_en1(&self) -> bool

Writing a 1 to REQ70_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req70_en1(&mut self, val: bool)

Writing a 1 to REQ70_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req71_en1(&self) -> bool

Writing a 1 to REQ71_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req71_en1(&mut self, val: bool)

Writing a 1 to REQ71_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req72_en1(&self) -> bool

Writing a 1 to REQ72_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req72_en1(&mut self, val: bool)

Writing a 1 to REQ72_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req73_en1(&self) -> bool

Writing a 1 to REQ73_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req73_en1(&mut self, val: bool)

Writing a 1 to REQ73_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req74_en1(&self) -> bool

Writing a 1 to REQ74_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req74_en1(&mut self, val: bool)

Writing a 1 to REQ74_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req75_en1(&self) -> bool

Writing a 1 to REQ75_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req75_en1(&mut self, val: bool)

Writing a 1 to REQ75_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req76_en1(&self) -> bool

Writing a 1 to REQ76_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req76_en1(&mut self, val: bool)

Writing a 1 to REQ76_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req77_en1(&self) -> bool

Writing a 1 to REQ77_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req77_en1(&mut self, val: bool)

Writing a 1 to REQ77_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req78_en1(&self) -> bool

Writing a 1 to REQ78_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req78_en1(&mut self, val: bool)

Writing a 1 to REQ78_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req79_en1(&self) -> bool

Writing a 1 to REQ79_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req79_en1(&mut self, val: bool)

Writing a 1 to REQ79_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req80_en1(&self) -> bool

Writing a 1 to REQ80_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req80_en1(&mut self, val: bool)

Writing a 1 to REQ80_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req81_en1(&self) -> bool

Writing a 1 to REQ81_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req81_en1(&mut self, val: bool)

Writing a 1 to REQ81_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req82_en1(&self) -> bool

Writing a 1 to REQ82_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req82_en1(&mut self, val: bool)

Writing a 1 to REQ82_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req83_en1(&self) -> bool

Writing a 1 to REQ83_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req83_en1(&mut self, val: bool)

Writing a 1 to REQ83_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req84_en1(&self) -> bool

Writing a 1 to REQ84_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req84_en1(&mut self, val: bool)

Writing a 1 to REQ84_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req85_en1(&self) -> bool

Writing a 1 to REQ85_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req85_en1(&mut self, val: bool)

Writing a 1 to REQ85_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req86_en1(&self) -> bool

Writing a 1 to REQ86_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req86_en1(&mut self, val: bool)

Writing a 1 to REQ86_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req87_en1(&self) -> bool

Writing a 1 to REQ87_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req87_en1(&mut self, val: bool)

Writing a 1 to REQ87_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req88_en1(&self) -> bool

Writing a 1 to REQ88_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req88_en1(&mut self, val: bool)

Writing a 1 to REQ88_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req89_en1(&self) -> bool

Writing a 1 to REQ89_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req89_en1(&mut self, val: bool)

Writing a 1 to REQ89_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req90_en1(&self) -> bool

Writing a 1 to REQ90_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req90_en1(&mut self, val: bool)

Writing a 1 to REQ90_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req91_en1(&self) -> bool

Writing a 1 to REQ91_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req91_en1(&mut self, val: bool)

Writing a 1 to REQ91_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req92_en1(&self) -> bool

Writing a 1 to REQ92_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req92_en1(&mut self, val: bool)

Writing a 1 to REQ92_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req93_en1(&self) -> bool

Writing a 1 to REQ93_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req93_en1(&mut self, val: bool)

Writing a 1 to REQ93_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req94_en1(&self) -> bool

Writing a 1 to REQ94_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req94_en1(&mut self, val: bool)

Writing a 1 to REQ94_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn req95_en1(&self) -> bool

Writing a 1 to REQ95_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

pub const fn set_req95_en1(&mut self, val: bool)

Writing a 1 to REQ95_EN1 in this register clears the corresponding bit in DMA1_REQ_ENABLE2.

Trait Implementations

impl Clone for Dma1ReqEnable2Clr

fn clone(&self) -> Dma1ReqEnable2Clr

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Dma1ReqEnable2Clr

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Dma1ReqEnable2Clr

fn default() -> Dma1ReqEnable2Clr

Returns the “default value” for a type.

impl PartialEq for Dma1ReqEnable2Clr

fn eq(&self, other: &Dma1ReqEnable2Clr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Dma1ReqEnable2Clr

impl Eq for Dma1ReqEnable2Clr

impl StructuralPartialEq for Dma1ReqEnable2Clr