Enum ExtTrigInp 

#[repr(u8)]
pub enum ExtTrigInp {
    Val0 = 0,
    Val1 = 1,
    Val2 = 2,
    Val3 = 3,
    Val4 = 4,
    Val5 = 5,
    Val6 = 6,
    Val7 = 7,
    Val8 = 8,
    Val9 = 9,
    Val10 = 10,
    Val11 = 11,
    Val12 = 12,
    Val13 = 13,
    Val14 = 14,
    Val15 = 15,
    Val16 = 16,
    Val17 = 17,
    Val18 = 18,
    Val19 = 19,
    Val20 = 20,
    Val21 = 21,
    Val22 = 22,
    Val23 = 23,
    _RESERVED_18 = 24,
    _RESERVED_19 = 25,
    Val26 = 26,
    Val27 = 27,
    Val28 = 28,
    Val29 = 29,
    Val30 = 30,
    Val31 = 31,
    Val32 = 32,
    Val33 = 33,
    Val34 = 34,
    Val35 = 35,
    Val36 = 36,
    Val37 = 37,
    Val38 = 38,
    Val39 = 39,
    Val40 = 40,
    Val41 = 41,
    Val42 = 42,
    Val43 = 43,
    Val44 = 44,
    Val45 = 45,
    Val46 = 46,
    Val47 = 47,
    _RESERVED_30 = 48,
    _RESERVED_31 = 49,
    _RESERVED_32 = 50,
    _RESERVED_33 = 51,
    _RESERVED_34 = 52,
    _RESERVED_35 = 53,
    _RESERVED_36 = 54,
    _RESERVED_37 = 55,
    _RESERVED_38 = 56,
    _RESERVED_39 = 57,
    _RESERVED_3a = 58,
    _RESERVED_3b = 59,
    _RESERVED_3c = 60,
    _RESERVED_3d = 61,
    _RESERVED_3e = 62,
    _RESERVED_3f = 63,
}

Variants

Val0 = 0

PINT PIN_INT0 input is selected.

Val1 = 1

PINT PIN_INT1 input is selected.

Val2 = 2

ADC0_IRQ input is selected.

Val3 = 3

ADC1_IRQ input is selected.

Val4 = 4

ADC0_tcomp[0] input is selected.

Val5 = 5

ADC1_tcomp[0] input is selected.

Val6 = 6

PWM0_SM0_MUX_TRIG0/PWM0_SM0_MUX_TRIG1 input is selected.

Val7 = 7

PWM0_SM1_MUX_TRIG0/PWM0_SM1_MUX_TRIG1 input is selected.

Val8 = 8

PWM0_SM2_MUX_TRIG0/PWM0_SM2_MUX_TRIG1 input is selected.

Val9 = 9

PWM0_SM3_MUX_TRIG0/PWM0_SM3_MUX_TRIG1 input is selected.

Val10 = 10

PWM1_SM0_MUX_TRIG0/PWM1_SM0_MUX_TRIG1 input is selected.

Val11 = 11

PWM1_SM1_MUX_TRIG0/PWM1_SM1_MUX_TRIG1 input is selected.

Val12 = 12

PWM1_SM2_MUX_TRIG0/PWM1_SM2_MUX_TRIG1 input is selected.

Val13 = 13

PWM1_SM3_MUX_TRIG0/PWM1_SM3_MUX_TRIG1 input is selected.

Val14 = 14

QDC0_CMP/POS_MATCH input is selected.

Val15 = 15

QDC1_CMP/POS_MATCH input is selected.

Val16 = 16

EVTG_OUT0A input is selected.

Val17 = 17

EVTG_OUT0B input is selected.

Val18 = 18

EVTG_OUT1A input is selected.

Val19 = 19

EVTG_OUT1B input is selected.

Val20 = 20

EVTG_OUT2A input is selected.

Val21 = 21

EVTG_OUT2B input is selected.

Val22 = 22

EVTG_OUT3A input is selected.

Val23 = 23

EVTG_OUT3B input is selected.

_RESERVED_18 = 24

_RESERVED_19 = 25

Val26 = 26

LPTMR0 input is selected.

Val27 = 27

LPTMR1 input is selected.

Val28 = 28

SCT Out0 input is selected.

Val29 = 29

SCT Out1 input is selected.

Val30 = 30

SCT Out2 input is selected.

Val31 = 31

SCT Out3 input is selected.

Val32 = 32

SCT Out4 input is selected.

Val33 = 33

SCT Out5 input is selected.

Val34 = 34

LP_FLEXCOMM0 trigger output 3 input is selected.

Val35 = 35

LP_FLEXCOMM1 trigger output 3 input is selected.

Val36 = 36

LP_FLEXCOMM2 trigger output 3 input is selected.

Val37 = 37

LP_FLEXCOMM3 trigger output 3 input is selected.

Val38 = 38

LP_FLEXCOMM4 trigger output 3 input is selected.

Val39 = 39

LP_FLEXCOMM5 trigger output 3 input is selected.

Val40 = 40

LP_FLEXCOMM6 trigger output 3 input is selected.

Val41 = 41

LP_FLEXCOMM7 trigger output 3 input is selected.

Val42 = 42

LP_FLEXCOMM8 trigger output 3 input is selected.

Val43 = 43

LP_FLEXCOMM9 trigger output 3 input is selected.

Val44 = 44

CMP0_OUT input is selected.

Val45 = 45

CMP1_OUT input is selected.

Val46 = 46

CMP2_OUT input is selected.

Val47 = 47

ENET_PPS_OUT_0 input is selected.

_RESERVED_30 = 48

_RESERVED_31 = 49

_RESERVED_32 = 50

_RESERVED_33 = 51

_RESERVED_34 = 52

_RESERVED_35 = 53

_RESERVED_36 = 54

_RESERVED_37 = 55

_RESERVED_38 = 56

_RESERVED_39 = 57

_RESERVED_3a = 58

_RESERVED_3b = 59

_RESERVED_3c = 60

_RESERVED_3d = 61

_RESERVED_3e = 62

_RESERVED_3f = 63

Implementations

impl ExtTrigInp

pub const fn from_bits(val: u8) -> ExtTrigInp

pub const fn to_bits(self) -> u8

Trait Implementations

impl Clone for ExtTrigInp

fn clone(&self) -> ExtTrigInp

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for ExtTrigInp

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<ExtTrigInp> for u8

fn from(val: ExtTrigInp) -> u8

Converts to this type from the input type.

impl From<u8> for ExtTrigInp

fn from(val: u8) -> ExtTrigInp

Converts to this type from the input type.

impl Ord for ExtTrigInp

fn cmp(&self, other: &ExtTrigInp) -> Ordering

This method returns an Ordering between self and other.

fn max(self, other: Self) -> Self

where Self: Sized,

Compares and returns the maximum of two values.

fn min(self, other: Self) -> Self

where Self: Sized,

Compares and returns the minimum of two values.

fn clamp(self, min: Self, max: Self) -> Self

where Self: Sized,

Restrict a value to a certain interval.

impl PartialEq for ExtTrigInp

fn eq(&self, other: &ExtTrigInp) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for ExtTrigInp

fn partial_cmp(&self, other: &ExtTrigInp) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Copy for ExtTrigInp

impl Eq for ExtTrigInp

impl StructuralPartialEq for ExtTrigInp