Struct Ccgr1 

#[repr(transparent)]
pub struct Ccgr1(pub u32);

CCM Clock Gating Register 1

Tuple Fields

0: u32

Implementations

impl Ccgr1

pub const fn cg0(&self) -> u8

lpspi1 clocks (lpspi1_clk_enable)

pub const fn set_cg0(&mut self, val: u8)

lpspi1 clocks (lpspi1_clk_enable)

pub const fn cg1(&self) -> u8

lpspi2 clocks (lpspi2_clk_enable)

pub const fn set_cg1(&mut self, val: u8)

lpspi2 clocks (lpspi2_clk_enable)

pub const fn cg2(&self) -> u8

Reserved

pub const fn set_cg2(&mut self, val: u8)

Reserved

pub const fn cg3(&self) -> u8

Reserved

pub const fn set_cg3(&mut self, val: u8)

Reserved

pub const fn cg4(&self) -> u8

Reserved

pub const fn set_cg4(&mut self, val: u8)

Reserved

pub const fn cg5(&self) -> u8

Reserved

pub const fn set_cg5(&mut self, val: u8)

Reserved

pub const fn cg6(&self) -> u8

pit clocks (pit_clk_enable)

pub const fn set_cg6(&mut self, val: u8)

pit clocks (pit_clk_enable)

pub const fn cg7(&self) -> u8

Reserved

pub const fn set_cg7(&mut self, val: u8)

Reserved

pub const fn cg8(&self) -> u8

adc1 clock (adc1_clk_enable)

pub const fn set_cg8(&mut self, val: u8)

adc1 clock (adc1_clk_enable)

pub const fn cg9(&self) -> u8

Reserved

pub const fn set_cg9(&mut self, val: u8)

Reserved

pub const fn cg10(&self) -> u8

gpt1 bus clock (gpt_clk_enable)

pub const fn set_cg10(&mut self, val: u8)

gpt1 bus clock (gpt_clk_enable)

pub const fn cg11(&self) -> u8

gpt1 serial clock (gpt_serial_clk_enable)

pub const fn set_cg11(&mut self, val: u8)

gpt1 serial clock (gpt_serial_clk_enable)

pub const fn cg12(&self) -> u8

lpuart4 clock (lpuart4_clk_enable)

pub const fn set_cg12(&mut self, val: u8)

lpuart4 clock (lpuart4_clk_enable)

pub const fn cg13(&self) -> u8

gpio1 clock (gpio1_clk_enable)

pub const fn set_cg13(&mut self, val: u8)

gpio1 clock (gpio1_clk_enable)

pub const fn cg14(&self) -> u8

csu clock (csu_clk_enable)

pub const fn set_cg14(&mut self, val: u8)

csu clock (csu_clk_enable)

pub const fn cg15(&self) -> u8

gpio5 clock (gpio5_clk_enable)

pub const fn set_cg15(&mut self, val: u8)

gpio5 clock (gpio5_clk_enable)

Trait Implementations

impl Clone for Ccgr1

fn clone(&self) -> Ccgr1

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Ccgr1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Ccgr1

fn default() -> Ccgr1

Returns the “default value” for a type.

impl PartialEq for Ccgr1

fn eq(&self, other: &Ccgr1) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ccgr1

impl Eq for Ccgr1

impl StructuralPartialEq for Ccgr1