Struct Sis 

#[repr(transparent)]
pub struct Sis(pub u32);

InterruptStat Register.

Tuple Fields

0: u32

Implementations

impl Sis

pub const fn rx_fifo_ful(&self) -> bool

SPDIF Rx FIFO full, can’t be cleared with reg. IntClear. To clear it, read from Rx FIFO.

pub const fn set_rx_fifo_ful(&mut self, val: bool)

SPDIF Rx FIFO full, can’t be cleared with reg. IntClear. To clear it, read from Rx FIFO.

pub const fn tx_em(&self) -> bool

SPDIF Tx FIFO empty, can’t be cleared with reg. IntClear. To clear it, write toTx FIFO.

pub const fn set_tx_em(&mut self, val: bool)

SPDIF Tx FIFO empty, can’t be cleared with reg. IntClear. To clear it, write toTx FIFO.

pub const fn lock_loss(&self) -> bool

SPDIF receiver loss of lock.

pub const fn set_lock_loss(&mut self, val: bool)

SPDIF receiver loss of lock.

pub const fn rx_fifo_resyn(&self) -> bool

Rx FIFO resync.

pub const fn set_rx_fifo_resyn(&mut self, val: bool)

Rx FIFO resync.

pub const fn rx_fifo_un_ov(&self) -> bool

Rx FIFO underrun/overrun.

pub const fn set_rx_fifo_un_ov(&mut self, val: bool)

Rx FIFO underrun/overrun.

pub const fn uq_err(&self) -> bool

U/Q Channel framing error.

pub const fn set_uq_err(&mut self, val: bool)

U/Q Channel framing error.

pub const fn uq_sync(&self) -> bool

U/Q Channel sync found.

pub const fn set_uq_sync(&mut self, val: bool)

U/Q Channel sync found.

pub const fn q_rx_ov(&self) -> bool

Q Channel receive register overrun.

pub const fn set_q_rx_ov(&mut self, val: bool)

Q Channel receive register overrun.

pub const fn q_rx_ful(&self) -> bool

Q Channel receive register full, can’t be cleared with reg.

pub const fn set_q_rx_ful(&mut self, val: bool)

Q Channel receive register full, can’t be cleared with reg.

pub const fn u_rx_ov(&self) -> bool

U Channel receive register overrun.

pub const fn set_u_rx_ov(&mut self, val: bool)

U Channel receive register overrun.

pub const fn u_rx_ful(&self) -> bool

U Channel receive register full, can’t be cleared with reg.

pub const fn set_u_rx_ful(&mut self, val: bool)

U Channel receive register full, can’t be cleared with reg.

pub const fn bit_err(&self) -> bool

SPDIF receiver found parity bit error.

pub const fn set_bit_err(&mut self, val: bool)

SPDIF receiver found parity bit error.

pub const fn sym_err(&self) -> bool

SPDIF receiver found illegal symbol.

pub const fn set_sym_err(&mut self, val: bool)

SPDIF receiver found illegal symbol.

pub const fn val_no_good(&self) -> bool

SPDIF validity flag no good.

pub const fn set_val_no_good(&mut self, val: bool)

SPDIF validity flag no good.

pub const fn c_new(&self) -> bool

SPDIF receive change in value of control channel.

pub const fn set_c_new(&mut self, val: bool)

SPDIF receive change in value of control channel.

pub const fn tx_resyn(&self) -> bool

SPDIF Tx FIFO resync.

pub const fn set_tx_resyn(&mut self, val: bool)

SPDIF Tx FIFO resync.

pub const fn tx_un_ov(&self) -> bool

SPDIF Tx FIFO under/overrun.

pub const fn set_tx_un_ov(&mut self, val: bool)

SPDIF Tx FIFO under/overrun.

pub const fn lock(&self) -> bool

SPDIF receiver’s DPLL is locked.

pub const fn set_lock(&mut self, val: bool)

SPDIF receiver’s DPLL is locked.

Trait Implementations

impl Clone for Sis

fn clone(&self) -> Sis

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Sis

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Sis

fn default() -> Sis

Returns the “default value” for a type.

impl PartialEq for Sis

fn eq(&self, other: &Sis) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Sis

impl Eq for Sis

impl StructuralPartialEq for Sis