Struct Ccgr6 

#[repr(transparent)]
pub struct Ccgr6(pub u32);

CCM Clock Gating Register 6

Tuple Fields

0: u32

Implementations

impl Ccgr6

pub const fn cg0(&self) -> u8

usboh3 clock (usboh3_clk_enable)

pub const fn set_cg0(&mut self, val: u8)

usboh3 clock (usboh3_clk_enable)

pub const fn cg1(&self) -> u8

usdhc1 clocks (usdhc1_clk_enable)

pub const fn set_cg1(&mut self, val: u8)

usdhc1 clocks (usdhc1_clk_enable)

pub const fn cg2(&self) -> u8

usdhc2 clocks (usdhc2_clk_enable)

pub const fn set_cg2(&mut self, val: u8)

usdhc2 clocks (usdhc2_clk_enable)

pub const fn cg3(&self) -> u8

dcdc clocks (dcdc_clk_enable)

pub const fn set_cg3(&mut self, val: u8)

dcdc clocks (dcdc_clk_enable)

pub const fn cg4(&self) -> u8

ipmux4 clock (ipmux4_clk_enable)

pub const fn set_cg4(&mut self, val: u8)

ipmux4 clock (ipmux4_clk_enable)

pub const fn cg5(&self) -> u8

flexspi clocks (flexspi_clk_enable) sim_ems_clk_enable must also be cleared, when flexspi_clk_enable is cleared

pub const fn set_cg5(&mut self, val: u8)

flexspi clocks (flexspi_clk_enable) sim_ems_clk_enable must also be cleared, when flexspi_clk_enable is cleared

pub const fn cg6(&self) -> u8

trng clock (trng_clk_enable)

pub const fn set_cg6(&mut self, val: u8)

trng clock (trng_clk_enable)

pub const fn cg7(&self) -> u8

lpuart8 clocks (lpuart8_clk_enable)

pub const fn set_cg7(&mut self, val: u8)

lpuart8 clocks (lpuart8_clk_enable)

pub const fn cg8(&self) -> u8

timer4 clocks (timer4_clk_enable)

pub const fn set_cg8(&mut self, val: u8)

timer4 clocks (timer4_clk_enable)

pub const fn cg9(&self) -> u8

aips_tz3 clock (aips_tz3_clk_enable)

pub const fn set_cg9(&mut self, val: u8)

aips_tz3 clock (aips_tz3_clk_enable)

pub const fn cg10(&self) -> u8

sim_axbs_p_clk_enable

pub const fn set_cg10(&mut self, val: u8)

sim_axbs_p_clk_enable

pub const fn cg11(&self) -> u8

anadig clocks (anadig_clk_enable)

pub const fn set_cg11(&mut self, val: u8)

anadig clocks (anadig_clk_enable)

pub const fn cg12(&self) -> u8

lpi2c4 serial clock (lpi2c4_serial_clk_enable)

pub const fn set_cg12(&mut self, val: u8)

lpi2c4 serial clock (lpi2c4_serial_clk_enable)

pub const fn cg13(&self) -> u8

timer1 clocks (timer1_clk_enable)

pub const fn set_cg13(&mut self, val: u8)

timer1 clocks (timer1_clk_enable)

pub const fn cg14(&self) -> u8

timer2 clocks (timer2_clk_enable)

pub const fn set_cg14(&mut self, val: u8)

timer2 clocks (timer2_clk_enable)

pub const fn cg15(&self) -> u8

timer3 clocks (timer3_clk_enable)

pub const fn set_cg15(&mut self, val: u8)

timer3 clocks (timer3_clk_enable)

Trait Implementations

impl Clone for Ccgr6

fn clone(&self) -> Ccgr6

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Ccgr6

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Ccgr6

fn default() -> Ccgr6

Returns the “default value” for a type.

impl PartialEq for Ccgr6

fn eq(&self, other: &Ccgr6) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ccgr6

impl Eq for Ccgr6

impl StructuralPartialEq for Ccgr6