pub struct Inputmux { /* private fields */ }Expand description
LPC_Next0 Peripheral Input Multiplexers Controller
Implementations§
Source§impl Inputmux
impl Inputmux
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self
pub const fn as_ptr(&self) -> *mut ()
Sourcepub const fn sct0_in_sel(self, n: usize) -> Reg<Sct0InSel, RW>
pub const fn sct0_in_sel(self, n: usize) -> Reg<Sct0InSel, RW>
SCT Peripheral Input Multiplexers N
Sourcepub const fn dsp_int_sel(self, n: usize) -> Reg<DspIntSel, RW>
pub const fn dsp_int_sel(self, n: usize) -> Reg<DspIntSel, RW>
DSP Interrupt Input Multiplexers N
Sourcepub const fn dmac0_itrig_sel(self, n: usize) -> Reg<Dmac0ItrigSel, RW>
pub const fn dmac0_itrig_sel(self, n: usize) -> Reg<Dmac0ItrigSel, RW>
DMAC0 Input Trigger Multiplexers N
Sourcepub const fn dmac0_otrig_sel(self, n: usize) -> Reg<Dmac0OtrigSel, RW>
pub const fn dmac0_otrig_sel(self, n: usize) -> Reg<Dmac0OtrigSel, RW>
DMAC0 Output Trigger Multiplexers N
Sourcepub const fn dmac1_itrig_sel(self, n: usize) -> Reg<Dmac1ItrigSel, RW>
pub const fn dmac1_itrig_sel(self, n: usize) -> Reg<Dmac1ItrigSel, RW>
DMAC1 Input Trigger Multiplexers N
Sourcepub const fn dmac1_otrig_sel(self, n: usize) -> Reg<Dmac1OtrigSel, RW>
pub const fn dmac1_otrig_sel(self, n: usize) -> Reg<Dmac1OtrigSel, RW>
DMAC1 Output Trigger Multiplexers N
Sourcepub const fn ct32bit_cap_sel(self, n: usize) -> Ct32bitCapSel
pub const fn ct32bit_cap_sel(self, n: usize) -> Ct32bitCapSel
CT32BITn Counter Timer Capture Trigger Multiplexers
Sourcepub const fn fmeasure_ch_sel(self, n: usize) -> Reg<FmeasureChSel, RW>
pub const fn fmeasure_ch_sel(self, n: usize) -> Reg<FmeasureChSel, RW>
Frequency Measurement Input Channel Multiplexers
Sourcepub const fn dmac0_req_ena0(self) -> Reg<Dmac0ReqEna0, RW>
pub const fn dmac0_req_ena0(self) -> Reg<Dmac0ReqEna0, RW>
DMAC0 request enable 0
Sourcepub const fn dmac0_req_ena1(self) -> Reg<Dmac0ReqEna1, RW>
pub const fn dmac0_req_ena1(self) -> Reg<Dmac0ReqEna1, RW>
DMAC0 request enable 1
Sourcepub const fn dmac0_req_ena0_set(self) -> Reg<Dmac0ReqEna0Set, W>
pub const fn dmac0_req_ena0_set(self) -> Reg<Dmac0ReqEna0Set, W>
DMAC0 request enable set 0
Sourcepub const fn dmac0_req_ena1_set(self) -> Reg<Dmac0ReqEna1Set, W>
pub const fn dmac0_req_ena1_set(self) -> Reg<Dmac0ReqEna1Set, W>
DMAC0 request enable set 1
Sourcepub const fn dmac0_req_ena0_clr(self) -> Reg<Dmac0ReqEna0Clr, W>
pub const fn dmac0_req_ena0_clr(self) -> Reg<Dmac0ReqEna0Clr, W>
DMAC0 request enable clear 0
Sourcepub const fn dmac0_req_ena1_clr(self) -> Reg<Dmac0ReqEna1Clr, W>
pub const fn dmac0_req_ena1_clr(self) -> Reg<Dmac0ReqEna1Clr, W>
DMAC0 request enable clear 1
Sourcepub const fn dmac1_req_ena0(self) -> Reg<Dmac1ReqEna0, RW>
pub const fn dmac1_req_ena0(self) -> Reg<Dmac1ReqEna0, RW>
DMAC1 request enable 0
Sourcepub const fn dmac1_req_ena1(self) -> Reg<Dmac1ReqEna1, RW>
pub const fn dmac1_req_ena1(self) -> Reg<Dmac1ReqEna1, RW>
DMAC1 request enable 1
Sourcepub const fn dmac1_req_ena0_set(self) -> Reg<Dmac1ReqEna0Set, W>
pub const fn dmac1_req_ena0_set(self) -> Reg<Dmac1ReqEna0Set, W>
DMAC1 request enable set 0
Sourcepub const fn dmac1_req_ena1_set(self) -> Reg<Dmac1ReqEna1Set, W>
pub const fn dmac1_req_ena1_set(self) -> Reg<Dmac1ReqEna1Set, W>
DMAC1 request enable set 1
Sourcepub const fn dmac1_req_ena0_clr(self) -> Reg<Dmac1ReqEna0Clr, W>
pub const fn dmac1_req_ena0_clr(self) -> Reg<Dmac1ReqEna0Clr, W>
DMAC1 request enable clear 0
Sourcepub const fn dmac1_req_ena1_clr(self) -> Reg<Dmac1ReqEna1Clr, W>
pub const fn dmac1_req_ena1_clr(self) -> Reg<Dmac1ReqEna1Clr, W>
DMAC1 request enable clear 1
Sourcepub const fn dmac0_itrig_ena0(self) -> Reg<Dmac0ItrigEna0, RW>
pub const fn dmac0_itrig_ena0(self) -> Reg<Dmac0ItrigEna0, RW>
DMAC0 input trigger enable 0
Sourcepub const fn dmac0_itrig_ena0_set(self) -> Reg<Dmac0ItrigEna0Set, W>
pub const fn dmac0_itrig_ena0_set(self) -> Reg<Dmac0ItrigEna0Set, W>
DMAC0 input trigger enable set 0
Sourcepub const fn dmac0_itrig_ena0_clr(self) -> Reg<Dmac0ItrigEna0Clr, W>
pub const fn dmac0_itrig_ena0_clr(self) -> Reg<Dmac0ItrigEna0Clr, W>
DMAC0 input trigger enable clear 0
Sourcepub const fn dmac1_itrig_ena0(self) -> Reg<Dmac1ItrigEna0, RW>
pub const fn dmac1_itrig_ena0(self) -> Reg<Dmac1ItrigEna0, RW>
DMAC1 input trigger enable 0
Sourcepub const fn dmac1_itrig_ena0_set(self) -> Reg<Dmac1ItrigEna0Set, W>
pub const fn dmac1_itrig_ena0_set(self) -> Reg<Dmac1ItrigEna0Set, W>
DMAC1 input trigger enable set 0
Sourcepub const fn dmac1_itrig_ena0_clr(self) -> Reg<Dmac1ItrigEna0Clr, W>
pub const fn dmac1_itrig_ena0_clr(self) -> Reg<Dmac1ItrigEna0Clr, W>
DMAC1 input trigger enable clear 0