Module typelevel

Type-level interrupt infrastructure.

This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.

As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts! macro to bind interrupts, and the [crate::interrupt] module to manually register interrupt handlers and manipulate interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)

Enums

• ADC1_COMP
  ADC1_COMP typelevel interrupt.
• AES_LPUART1
  AES_LPUART1 typelevel interrupt.
• DMA1_CHANNEL1
  DMA1_CHANNEL1 typelevel interrupt.
• DMA1_CHANNEL2_3
  DMA1_CHANNEL2_3 typelevel interrupt.
• DMA1_CHANNEL4_5_6_7
  DMA1_CHANNEL4_5_6_7 typelevel interrupt.
• EXTI0_1
  EXTI0_1 typelevel interrupt.
• EXTI2_3
  EXTI2_3 typelevel interrupt.
• EXTI4_15
  EXTI4_15 typelevel interrupt.
• FLASH
  FLASH typelevel interrupt.
• I2C1
  I2C1 typelevel interrupt.
• LPTIM1
  LPTIM1 typelevel interrupt.
• PVD
  PVD typelevel interrupt.
• RCC
  RCC typelevel interrupt.
• RTC
  RTC typelevel interrupt.
• SPI1
  SPI1 typelevel interrupt.
• TIM2
  TIM2 typelevel interrupt.
• TIM21
  TIM21 typelevel interrupt.
• TIM22
  TIM22 typelevel interrupt.
• USART2
  USART2 typelevel interrupt.
• WWDG
  WWDG typelevel interrupt.

Traits

• Binding
  Compile-time assertion that an interrupt has been bound to a handler.
• Handler
  Interrupt handler trait.
• Interrupt
  Type-level interrupt.