embassy-stm32

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git

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stm32l071c8

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embassy_stm32::interrupt

Module typelevel

Source
Expand description

Type-level interrupt infrastructure.

This module contains one type per interrupt. This is used for checking at compile time that the interrupts are correctly bound to HAL drivers.

As an end user, you shouldn’t need to use this module directly. Use the crate::bind_interrupts! macro to bind interrupts, and the [crate::interrupt] module to manually register interrupt handlers and manipulate interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc…)

Enums§

  • ADC1_COMP typelevel interrupt.
  • DMA1_CHANNEL1 typelevel interrupt.
  • DMA1_CHANNEL2_3 typelevel interrupt.
  • DMA1_CHANNEL4_5_6_7 typelevel interrupt.
  • EXTI0_1 typelevel interrupt.
  • EXTI2_3 typelevel interrupt.
  • EXTI4_15 typelevel interrupt.
  • FLASH typelevel interrupt.
  • I2C1 typelevel interrupt.
  • I2C2 typelevel interrupt.
  • I2C3 typelevel interrupt.
  • LPTIM1 typelevel interrupt.
  • LPUART1 typelevel interrupt.
  • PVD typelevel interrupt.
  • RCC typelevel interrupt.
  • RTC typelevel interrupt.
  • SPI1 typelevel interrupt.
  • SPI2 typelevel interrupt.
  • TIM2 typelevel interrupt.
  • TIM3 typelevel interrupt.
  • TIM6 typelevel interrupt.
  • TIM7 typelevel interrupt.
  • TIM21 typelevel interrupt.
  • TIM22 typelevel interrupt.
  • USART1 typelevel interrupt.
  • USART2 typelevel interrupt.
  • USART4_5 typelevel interrupt.
  • WWDG typelevel interrupt.

Traits§

  • Compile-time assertion that an interrupt has been bound to a handler.
  • Interrupt handler trait.
  • Type-level interrupt.