pub fn npu_cache_enable()Expand description
Enable the NPU cache (CACHEAXI): switches on its RCC clock, pulses its
reset and sets the enable bit. The parent NPU clock domain must already
be enabled and released from reset (for example by super::Npu::new),
matching ST’s NPU_Config() ordering. Call once before running inferences
that touch cacheable memory pools (external flash / PSRAM).