Expand description
RAM configuration (RAMCFG)
RAMCFG lets you mass-erase an SRAM bank, tune its wait-state count, and (SRAM2 only) detect parity errors and write-protect individual 1 KB pages.
Currently only implemented for WBA, which has two RAMCFG-managed banks: SRAM1 (erase and wait-state only) and SRAM2 (also parity-error detection and write protection). A third bank, SRAM6 — feeding the 2.4 GHz radio’s TX/RX and sequencer RAMs — exists in hardware (wait-state configuration only) but isn’t currently exposed by the PAC.
U5 and N6 also have RAMCFG, but with a meaningfully different register layout (more banks, and ECC rather than parity error detection on some of them); that’s not covered here yet.
Structs§
- Parity
Error Address - Parity error location, read from
M2PEAR. - RamCfg
- RAMCFG driver.
- Sram1
- SRAM1 bank handle. See
RamCfg::sram1(). - Sram2
- SRAM2 bank handle. See
RamCfg::sram2().