Struct Gencs 

#[repr(transparent)]
pub struct Gencs(pub u32);

TSI General Control and Status Register. TSIEN and STM must not change during a scan. SWTS is a write-only start strobe, reading zero; it starts a software scan when STM=0. Clear DATA.EOSF before ESOR, and DATA.OUTRGF before OUTRG_EN or DMAEN_OUTRG. ACTIVE use requires TSIEN_DPD=0, TSIEN=1 and SPC configuration; low-power scan supports channels 0-3 and wakes through WUU, not the NVIC (59.1.3).

Tuple Fields

0: u32

Implementations

impl Gencs

pub const fn dmaen_eos(&self) -> bool

In-progress DMA Transfer Request Enable. Encodings: 0: Disable DMA request at End of Scan event; 1: Enable DMA request at End of event

pub const fn set_dmaen_eos(&mut self, val: bool)

In-progress DMA Transfer Request Enable. Encodings: 0: Disable DMA request at End of Scan event; 1: Enable DMA request at End of event

pub const fn dmaen_outrg(&self) -> bool

Out of Range DMA Transfer Request Enable. Encodings: 0: Disable DMA request at Out-of-Range event; 1: Enable DMA request at Out-of-Range event

pub const fn set_dmaen_outrg(&mut self, val: bool)

Out of Range DMA Transfer Request Enable. Encodings: 0: Disable DMA request at Out-of-Range event; 1: Enable DMA request at Out-of-Range event

pub const fn stm(&self) -> bool

Scan Trigger Mode. Encodings: 0: Software trigger scan; 1: Hardware trigger scan

pub const fn set_stm(&mut self, val: bool)

Scan Trigger Mode. Encodings: 0: Software trigger scan; 1: Hardware trigger scan

pub const fn tsien(&self) -> bool

Touch Sensing Input Module Enable. Encodings: 0: TSI module disabled; 1: TSI module enabled

pub const fn set_tsien(&mut self, val: bool)

Touch Sensing Input Module Enable. Encodings: 0: TSI module disabled; 1: TSI module enabled

pub const fn clk_sel(&self) -> bool

KHz clock selection. Encodings: 0: Select 16K clock to use; 1: Select 32K clock to use

pub const fn set_clk_sel(&mut self, val: bool)

KHz clock selection. Encodings: 0: Select 16K clock to use; 1: Select 32K clock to use

pub const fn swts(&self) -> bool

Software Trigger Start. Encodings: 0: No effect; 1: Takes effect

pub const fn set_swts(&mut self, val: bool)

Software Trigger Start. Encodings: 0: No effect; 1: Takes effect

pub const fn tsien_dpd(&self) -> bool

Enable of 3v domain logic in this IP. Encodings: 0: 3v domain logic is disabled; 1: 3v domain logic is enabled

pub const fn set_tsien_dpd(&mut self, val: bool)

Enable of 3v domain logic in this IP. Encodings: 0: 3v domain logic is disabled; 1: 3v domain logic is enabled

pub const fn dvolt(&self) -> u8

DVOLT. Encodings: 0: Vm=0.6 V, Vp=1.73 V; 1: Vm=0.6 V, Vp=1.82 V; 2: Vm=0.6 V, Vp=1.89 V; 3: Vm=0.6 V, Vp=1.98 V; 4: Vm=0.6 V, Vp=2.06 V; 5: Vm=0.6 V, Vp=2.14 V; 6: Vm=0.6 V, Vp=2.23 V; 7: Vm=0.6 V, Vp=2.31 V; 8: Vm=0.6 V, Vp=2.39 V; 9: Vm=0.6 V, Vp=2.47 V; 10: Vm=0.6 V, Vp=2.56 V; 11: Vm=0.6 V, Vp=2.64 V; 12: Vm=0.6 V, Vp=2.72 V; 13: Vm=0.6 V, Vp=2.81 V; 14: Vm=0.6 V, Vp=2.88 V; 15: Vm=0.6 V, Vp=2.97 V

pub const fn set_dvolt(&mut self, val: u8)

DVOLT. Encodings: 0: Vm=0.6 V, Vp=1.73 V; 1: Vm=0.6 V, Vp=1.82 V; 2: Vm=0.6 V, Vp=1.89 V; 3: Vm=0.6 V, Vp=1.98 V; 4: Vm=0.6 V, Vp=2.06 V; 5: Vm=0.6 V, Vp=2.14 V; 6: Vm=0.6 V, Vp=2.23 V; 7: Vm=0.6 V, Vp=2.31 V; 8: Vm=0.6 V, Vp=2.39 V; 9: Vm=0.6 V, Vp=2.47 V; 10: Vm=0.6 V, Vp=2.56 V; 11: Vm=0.6 V, Vp=2.64 V; 12: Vm=0.6 V, Vp=2.72 V; 13: Vm=0.6 V, Vp=2.81 V; 14: Vm=0.6 V, Vp=2.88 V; 15: Vm=0.6 V, Vp=2.97 V

pub const fn debounce_counter_configured(&self) -> u8

Numeric code N requires N+1 out-of-range events, 1..32 events.

pub const fn set_debounce_counter_configured(&mut self, val: u8)

Numeric code N requires N+1 out-of-range events, 1..32 events.

pub const fn esor(&self) -> bool

End of Scan Interrupt enable.. Encodings: 0: End of Scan interrupt is disable; 1: End of Scan interrupt is enabled

pub const fn set_esor(&mut self, val: bool)

End of Scan Interrupt enable.. Encodings: 0: End of Scan interrupt is disable; 1: End of Scan interrupt is enabled

pub const fn outrg_en(&self) -> bool

Out-of-range interrupt enable.. Encodings: 0: Out-of-range interrupt is disable; 1: Out-of-range interrupt is enabled

pub const fn set_outrg_en(&mut self, val: bool)

Out-of-range interrupt enable.. Encodings: 0: Out-of-range interrupt is disable; 1: Out-of-range interrupt is enabled

Trait Implementations

impl Clone for Gencs

fn clone(&self) -> Gencs

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Gencs

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Gencs

fn default() -> Gencs

Returns the “default value” for a type.

impl PartialEq for Gencs

fn eq(&self, other: &Gencs) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Gencs

impl Eq for Gencs

impl StructuralPartialEq for Gencs