#[repr(transparent)]pub struct MtlOperationMode(pub u32);Expand description
F70RM Rev. 1 section 51.7.2.2; manual text line 153903.
Tuple Fields§
§0: u32Implementations§
Source§impl MtlOperationMode
impl MtlOperationMode
Sourcepub const fn dtxsts(&self) -> bool
pub const fn dtxsts(&self) -> bool
Drop Transmit Status. - 1: Tx packet status received from the MAC is dropped in the MTL - 0: Tx packet status received from the MAC is forwarded to the application 0b - Drop Transmit Status is disabled 1b - Drop Transmit Status is enabled
Sourcepub const fn set_dtxsts(&mut self, val: bool)
pub const fn set_dtxsts(&mut self, val: bool)
Drop Transmit Status. - 1: Tx packet status received from the MAC is dropped in the MTL - 0: Tx packet status received from the MAC is forwarded to the application 0b - Drop Transmit Status is disabled 1b - Drop Transmit Status is enabled
Sourcepub const fn cntprst(&self) -> bool
pub const fn cntprst(&self) -> bool
Counters Preset. When this bit is set, - MTL_TxQ[0-7]_Underflow register is initialized/preset to 12’h7F0. - Missed Packet and Overflow Packet counters in MTL_RxQ[0-7]_Missed_Packet_Overflow_Cnt register is initialized/ preset to 12’h7F0. Access restrictions apply. - MAC initiates the counters preset when application writes 1. - MAC writes 0 after the counters preset is complete. - MAC ignores when application writes 0. NOTE This field is not testable by an automated register test. 0b - Counters Preset is disabled 1b - Counters Preset is enabled
Sourcepub const fn set_cntprst(&mut self, val: bool)
pub const fn set_cntprst(&mut self, val: bool)
Counters Preset. When this bit is set, - MTL_TxQ[0-7]_Underflow register is initialized/preset to 12’h7F0. - Missed Packet and Overflow Packet counters in MTL_RxQ[0-7]_Missed_Packet_Overflow_Cnt register is initialized/ preset to 12’h7F0. Access restrictions apply. - MAC initiates the counters preset when application writes 1. - MAC writes 0 after the counters preset is complete. - MAC ignores when application writes 0. NOTE This field is not testable by an automated register test. 0b - Counters Preset is disabled 1b - Counters Preset is enabled
Sourcepub const fn cntclr(&self) -> bool
pub const fn cntclr(&self) -> bool
Counters Reset. When this bit is set, all counters are reset. This bit is cleared automatically after 1 clock cycle. If this bit is set along with CNTPRST bit, CNTPRST has precedence. Access restrictions apply. - MAC initiates the counters reset when application writes 1. - MAC writes 0 after the counters reset is complete. - MAC ignores when application writes 0. NOTE This field is not testable by an automated register test. 0b - Counters are not reset 1b - All counters are reset
Sourcepub const fn set_cntclr(&mut self, val: bool)
pub const fn set_cntclr(&mut self, val: bool)
Counters Reset. When this bit is set, all counters are reset. This bit is cleared automatically after 1 clock cycle. If this bit is set along with CNTPRST bit, CNTPRST has precedence. Access restrictions apply. - MAC initiates the counters reset when application writes 1. - MAC writes 0 after the counters reset is complete. - MAC ignores when application writes 0. NOTE This field is not testable by an automated register test. 0b - Counters are not reset 1b - All counters are reset
Trait Implementations§
Source§impl Clone for MtlOperationMode
impl Clone for MtlOperationMode
Source§fn clone(&self) -> MtlOperationMode
fn clone(&self) -> MtlOperationMode
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more