Expand description
Peripheral access API (generated using chiptool v0.1.0 (e890244 2026-11-05))
Structs§
- Dma
- no description available
- DmaCh0
- no description available
- DmaCh0
Control - F70RM Rev. 1 section 51.7.5.2; manual text line 155697.
- DmaCh0
Current AppRxbuffer - F70RM Rev. 1 section 51.7.5.16; manual text line 156961.
- DmaCh0
Current AppRxdesc - F70RM Rev. 1 section 51.7.5.14; manual text line 156861.
- DmaCh0
Current AppTxbuffer - F70RM Rev. 1 section 51.7.5.15; manual text line 156915.
- DmaCh0
Current AppTxdesc - F70RM Rev. 1 section 51.7.5.13; manual text line 156808.
- DmaCh0
Interrupt Enable - F70RM Rev. 1 section 51.7.5.11; manual text line 156521.
- DmaCh0
Miss Frame Cnt - F70RM Rev. 1 section 51.7.5.18; manual text line 157324.
- DmaCh0
RxControl - F70RM Rev. 1 section 51.7.5.4; manual text line 155960.
- DmaCh0
RxControl2 - F70RM Rev. 1 section 51.7.5.10; manual text line 156452.
- DmaCh0
RxEri Cnt - F70RM Rev. 1 section 51.7.5.19; manual text line 157394.
- DmaCh0
RxInterrupt Watchdog Timer - F70RM Rev. 1 section 51.7.5.12; manual text line 156689.
- DmaCh0
Rxdesc List Address - F70RM Rev. 1 section 51.7.5.6; manual text line 156204.
- DmaCh0
Rxdesc Tail Pointer - F70RM Rev. 1 section 51.7.5.8; manual text line 156339.
- DmaCh0
Status - F70RM Rev. 1 section 51.7.5.17; manual text line 157015.
- DmaCh0
TxControl - F70RM Rev. 1 section 51.7.5.3; manual text line 155809.
- DmaCh0
Txdesc List Address - F70RM Rev. 1 section 51.7.5.5; manual text line 156127.
- DmaCh0
Txdesc Ring Length - F70RM Rev. 1 section 51.7.5.9; manual text line 156399.
- DmaCh0
Txdesc Tail Pointer - F70RM Rev. 1 section 51.7.5.7; manual text line 156272.
- DmaDebug
Status0 - F70RM Rev. 1 section 51.7.4.5; manual text line 155517.
- DmaInterrupt
Status - F70RM Rev. 1 section 51.7.4.4; manual text line 155396.
- DmaMode
- F70RM Rev. 1 section 51.7.4.2; manual text line 155024.
- DmaSysbus
Mode - F70RM Rev. 1 section 51.7.4.3; manual text line 155217.
- Enet
- MCX-A5 10/100 Ethernet QoS controller at ENET0 MAC base 0x4001c000. One MTL Tx/Rx queue and one DMA Tx/Rx channel; no generic-IP queue/channel arrays. Only the actual registers in the chapter 51.7 maps are exposed, not their generic “up to” counts. Feature reset words describe the fixed implementation: 32-bit addresses, 2 KiB Tx/Rx FIFOs, one MAC address, no TSO, hash table, AV/DCB, split-header, L3/L4 filters or PTP offload. PPSOUTNUM resets to zero despite mapped PPS registers; register presence is not a claim of an external PPS output. Raw numeric encodings must obey the manual and implemented features; generic prose mentioning absent options is not capability evidence. RCWE changes selected read-clear flags to write-one-to-clear; five map/XML read-only registers are ReadWrite here because detailed descriptions explicitly require acknowledgement writes. Reads can consume status/FIFO data. Avoid read-modify-write on mixed status/control registers. Per-field read-only restrictions are documented, not enforced by the flat IR. reset_value is a software Default from documented reset tables, not a live hardware observation.
- MacAddress0
High - F70RM Rev. 1 section 51.7.1.25; manual text line 151857.
- MacAddress0
Low - F70RM Rev. 1 section 51.7.1.26; manual text line 151932.
- MacAuxiliary
Control - F70RM Rev. 1 section 51.7.1.39; manual text line 153111.
- MacAuxiliary
Timestamp Nanoseconds - F70RM Rev. 1 section 51.7.1.40; manual text line 153210.
- MacAuxiliary
Timestamp Seconds - F70RM Rev. 1 section 51.7.1.41; manual text line 153278.
- MacConfiguration
- F70RM Rev. 1 section 51.7.1.2; manual text line 148297.
- MacCsr
SwCtrl - F70RM Rev. 1 section 51.7.1.24; manual text line 151777.
- MacDebug
- F70RM Rev. 1 section 51.7.1.16; manual text line 150510.
- MacExt
Configuration - F70RM Rev. 1 section 51.7.1.3; manual text line 148664.
- MacHw
Feature0 - F70RM Rev. 1 section 51.7.1.17; manual text line 150611.
- MacHw
Feature1 - F70RM Rev. 1 section 51.7.1.18; manual text line 150830.
- MacHw
Feature2 - F70RM Rev. 1 section 51.7.1.19; manual text line 151055.
- MacHw
Feature3 - F70RM Rev. 1 section 51.7.1.20; manual text line 151232.
- MacHw
Feature4 - F70RM Rev. 1 section 51.7.1.21; manual text line 151428.
- MacInner
Vlan Incl - F70RM Rev. 1 section 51.7.1.8; manual text line 149461.
- MacInterrupt
Enable - F70RM Rev. 1 section 51.7.1.12; manual text line 150018.
- MacInterrupt
Status - F70RM Rev. 1 section 51.7.1.11; manual text line 149801.
- MacMdio
Address - F70RM Rev. 1 section 51.7.1.22; manual text line 151481.
- MacMdio
Data - F70RM Rev. 1 section 51.7.1.23; manual text line 151704.
- MacPacket
Filter - F70RM Rev. 1 section 51.7.1.4; manual text line 148812.
- MacPmt
Control Status - F70RM Rev. 1 section 51.7.1.14; manual text line 150312.
- MacPps0
Target Time Nanoseconds - F70RM Rev. 1 section 51.7.1.48; manual text line 153813.
- MacPps0
Target Time Seconds - F70RM Rev. 1 section 51.7.1.47; manual text line 153754.
- MacPps
Control - F70RM Rev. 1 section 51.7.1.46; manual text line 153594.
- MacQ0
TxFlow Ctrl - F70RM Rev. 1 section 51.7.1.9; manual text line 149573.
- MacRx
Domain Time Incr - F70RM Rev. 1 section 51.7.1.35; manual text line 152856.
- MacRx
Flow Ctrl - F70RM Rev. 1 section 51.7.1.10; manual text line 149719.
- MacRx
TxStatus - F70RM Rev. 1 section 51.7.1.13; manual text line 150168.
- MacSub
Second Increment - F70RM Rev. 1 section 51.7.1.28; manual text line 152297.
- MacSystem
Time Nanoseconds - F70RM Rev. 1 section 51.7.1.30; manual text line 152432.
- MacSystem
Time Nanoseconds Update - F70RM Rev. 1 section 51.7.1.32; manual text line 152548.
- MacSystem
Time Seconds - F70RM Rev. 1 section 51.7.1.29; manual text line 152374.
- MacSystem
Time Seconds Update - F70RM Rev. 1 section 51.7.1.31; manual text line 152497.
- MacTimestamp
Addend - F70RM Rev. 1 section 51.7.1.33; manual text line 152629.
- MacTimestamp
Control - F70RM Rev. 1 section 51.7.1.27; manual text line 151984.
- MacTimestamp
Egress Corr Nanosecond - F70RM Rev. 1 section 51.7.1.43; manual text line 153376.
- MacTimestamp
Egress Latency - F70RM Rev. 1 section 51.7.1.45; manual text line 153511.
- MacTimestamp
Ingress Corr Nanosecond - F70RM Rev. 1 section 51.7.1.42; manual text line 153323.
- MacTimestamp
Ingress Latency - F70RM Rev. 1 section 51.7.1.44; manual text line 153429.
- MacTimestamp
Status - F70RM Rev. 1 section 51.7.1.34; manual text line 152677.
- MacTx
Domain Time Incr - F70RM Rev. 1 section 51.7.1.36; manual text line 152922.
- MacTx
Timestamp Status Nanoseconds - F70RM Rev. 1 section 51.7.1.37; manual text line 152988.
- MacTx
Timestamp Status Seconds - F70RM Rev. 1 section 51.7.1.38; manual text line 153058.
- MacVersion
- F70RM Rev. 1 section 51.7.1.15; manual text line 150450.
- MacVlan
Incl - F70RM Rev. 1 section 51.7.1.7; manual text line 149322.
- MacVlan
Tag - F70RM Rev. 1 section 51.7.1.6; manual text line 149146.
- MacWd
JbTimeout - F70RM Rev. 1 section 51.7.1.5; manual text line 148979.
- Mtl
- no description available
- MtlInterrupt
Status - F70RM Rev. 1 section 51.7.2.3; manual text line 154036.
- MtlOperation
Mode - F70RM Rev. 1 section 51.7.2.2; manual text line 153903.
- MtlQ0
- no description available
- MtlQ0
Interrupt Control Status - F70RM Rev. 1 section 51.7.3.5; manual text line 154530.
- MtlRxq0
Debug - F70RM Rev. 1 section 51.7.3.8; manual text line 154912.
- MtlRxq0
Missed Packet Overflow Cnt - F70RM Rev. 1 section 51.7.3.7; manual text line 154817.
- MtlRxq0
Operation Mode - F70RM Rev. 1 section 51.7.3.6; manual text line 154665.
- MtlTxq0
Debug - F70RM Rev. 1 section 51.7.3.4; manual text line 154400.
- MtlTxq0
Operation Mode - F70RM Rev. 1 section 51.7.3.2; manual text line 154195.
- MtlTxq0
Underflow - F70RM Rev. 1 section 51.7.3.3; manual text line 154323.