pub struct DmaCh0 { /* private fields */ }Expand description
no description available
Implementations§
Source§impl DmaCh0
impl DmaCh0
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self
pub const fn as_ptr(&self) -> *mut ()
Sourcepub const fn dma_ch0_control(self) -> Reg<DmaCh0Control, RW>
pub const fn dma_ch0_control(self) -> Reg<DmaCh0Control, RW>
DMA Channel 0 Control.
Sourcepub const fn dma_ch0_tx_control(self) -> Reg<DmaCh0TxControl, RW>
pub const fn dma_ch0_tx_control(self) -> Reg<DmaCh0TxControl, RW>
DMA Channel 0 Transmit Control.
Sourcepub const fn dma_ch0_rx_control(self) -> Reg<DmaCh0RxControl, RW>
pub const fn dma_ch0_rx_control(self) -> Reg<DmaCh0RxControl, RW>
DMA Channel 0 Receive Control.
Sourcepub const fn dma_ch0_txdesc_list_address(
self,
) -> Reg<DmaCh0TxdescListAddress, RW>
pub const fn dma_ch0_txdesc_list_address( self, ) -> Reg<DmaCh0TxdescListAddress, RW>
Channel 0 Transmit Descriptor List Address.
Sourcepub const fn dma_ch0_rxdesc_list_address(
self,
) -> Reg<DmaCh0RxdescListAddress, RW>
pub const fn dma_ch0_rxdesc_list_address( self, ) -> Reg<DmaCh0RxdescListAddress, RW>
Channel 0 Receive Descriptor List Address.
Sourcepub const fn dma_ch0_txdesc_tail_pointer(
self,
) -> Reg<DmaCh0TxdescTailPointer, RW>
pub const fn dma_ch0_txdesc_tail_pointer( self, ) -> Reg<DmaCh0TxdescTailPointer, RW>
Channel 0 Transmit Descriptor Tail Pointer.
Sourcepub const fn dma_ch0_rxdesc_tail_pointer(
self,
) -> Reg<DmaCh0RxdescTailPointer, RW>
pub const fn dma_ch0_rxdesc_tail_pointer( self, ) -> Reg<DmaCh0RxdescTailPointer, RW>
Channel 0 Receive Descriptor Tail Pointer.
Sourcepub const fn dma_ch0_txdesc_ring_length(self) -> Reg<DmaCh0TxdescRingLength, RW>
pub const fn dma_ch0_txdesc_ring_length(self) -> Reg<DmaCh0TxdescRingLength, RW>
Channel 0 Transmit Descriptor Ring Length.
Sourcepub const fn dma_ch0_rx_control2(self) -> Reg<DmaCh0RxControl2, RW>
pub const fn dma_ch0_rx_control2(self) -> Reg<DmaCh0RxControl2, RW>
Channel 0 Receive Control.
Sourcepub const fn dma_ch0_interrupt_enable(self) -> Reg<DmaCh0InterruptEnable, RW>
pub const fn dma_ch0_interrupt_enable(self) -> Reg<DmaCh0InterruptEnable, RW>
Channel 0 Interrupt Enable.
Sourcepub const fn dma_ch0_rx_interrupt_watchdog_timer(
self,
) -> Reg<DmaCh0RxInterruptWatchdogTimer, RW>
pub const fn dma_ch0_rx_interrupt_watchdog_timer( self, ) -> Reg<DmaCh0RxInterruptWatchdogTimer, RW>
Channel 0 Receive Interrupt Watchdog Timer.
Sourcepub const fn dma_ch0_current_app_txdesc(self) -> Reg<DmaCh0CurrentAppTxdesc, R>
pub const fn dma_ch0_current_app_txdesc(self) -> Reg<DmaCh0CurrentAppTxdesc, R>
Channel 0 Current Application Transmit Descriptor.
Sourcepub const fn dma_ch0_current_app_rxdesc(self) -> Reg<DmaCh0CurrentAppRxdesc, R>
pub const fn dma_ch0_current_app_rxdesc(self) -> Reg<DmaCh0CurrentAppRxdesc, R>
Channel 0 Current Application Receive Descriptor.
Sourcepub const fn dma_ch0_current_app_txbuffer(
self,
) -> Reg<DmaCh0CurrentAppTxbuffer, R>
pub const fn dma_ch0_current_app_txbuffer( self, ) -> Reg<DmaCh0CurrentAppTxbuffer, R>
Channel 0 Current Application Transmit Buffer Address.
Sourcepub const fn dma_ch0_current_app_rxbuffer(
self,
) -> Reg<DmaCh0CurrentAppRxbuffer, R>
pub const fn dma_ch0_current_app_rxbuffer( self, ) -> Reg<DmaCh0CurrentAppRxbuffer, R>
Channel 0 Current Application Receive Buffer Address.
Sourcepub const fn dma_ch0_status(self) -> Reg<DmaCh0Status, RW>
pub const fn dma_ch0_status(self) -> Reg<DmaCh0Status, RW>
Channel 0 Status. Interrupt flags are write-one-to-clear; TEB and REB are read-only error masks, not two-state enumerations. Avoid read-modify-write.
Sourcepub const fn dma_ch0_miss_frame_cnt(self) -> Reg<DmaCh0MissFrameCnt, R>
pub const fn dma_ch0_miss_frame_cnt(self) -> Reg<DmaCh0MissFrameCnt, R>
Channel 0 Miss Frame Count. Missed-frame counter and overflow flag clear on read.
Sourcepub const fn dma_ch0_rx_eri_cnt(self) -> Reg<DmaCh0RxEriCnt, R>
pub const fn dma_ch0_rx_eri_cnt(self) -> Reg<DmaCh0RxEriCnt, R>
Channel 0 Receive ERI Count.